Active and preferred
RoHS準拠
鉛フリー

IMSQ120R040M2HH

CoolSiC™ MOSFET discrete 1200 V in top-side cooled Q-DPAK dual half-bridge package
EA.
在庫あり

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

IMSQ120R040M2HH
IMSQ120R040M2HH
EA.

Product details

  • Ciss
    1310 pF
  • Coss
    55 pF
  • ID (@25°C) max
    48 A
  • Ptot max
    218 W
  • Qgd
    10 nC
  • QG
    39 nC
  • RDS (on) (@ Tj = 25°C)
    40 mΩ
  • RthJA max
    62 K/W
  • RthJC max
    0.69 K/W
  • Tj max
    200 °C
  • VDS max
    1200 V
  • パッケージ
    PG-HDSOP-16
  • ピン数
    4 Pins
  • 動作温度
    -55 °C to 175 °C
  • 実装
    SMD
  • 技術
    CoolSiC™ G2
  • 極性
    N
  • 認定
    Industrial
OPN
IMSQ120R040M2HHXUMA1
製品ステータス active and preferred
インフィニオンパッケージ
パッケージ名 N/A
包装サイズ 750
包装形態 TAPE & REEL
水分レベル 2
モイスチャーパッキン DRY
鉛フリー Yes
ハロゲンフリー Yes
RoHS準拠 Yes
Infineon stock last updated:
EA. 在庫あり

製品ステータス
Active
インフィニオンパッケージ
パッケージ名 -
包装サイズ 750
包装形態 TAPE & REEL
水分レベル 2
モイスチャーパッキン DRY
鉛フリー
ハロゲンフリー
RoHS対応
EA.
在庫あり
CoolSiC™ MOSFET discrete 1200 V, 26 mΩ G2 in a top-side cooled Q-DPAK dual half-bridge package specifically designed for wide use in industrial application, including, industrial drives, EV charging solutions, solar systems and uninterruptible power supply. The Q-DPAK provides customers with a reduced system cost by enabling easier assembly with outstanding thermal performance. Compared to bottom-side cooled solutions, top-side cooled devices enable a more optimized PCB layout, which in turn reduces the effects of parasitic components and stray inductances, while also providing enhanced thermal management capabilities.
The top-side cooled Q-DPAK Dual half-bridge package is introducing a new era in cooling, energy efficiency, design flexibility and performance.

機能

  • VDSS = 1200 V at Tvj = 25°C
  • IDDC = 40 A at TC = 100°C
  • RDS(on) = 40 mΩ, VGS = 18 V, Tvj = 25°C
  • Very low switching losses
  • Overload operation up to Tvj = 200°C 
  • Short circuit withstand time 2 µs
  • Benchmark gate threshold voltage 4.2 V
  • Robust against parasitic turn on
  • Robust body diode for hard commutation
  • .XT interconnection technology 

利点

  • Higher power density
  • Enabling automated assembly
  • Less complex designs needed
  • Outstanding thermal performance vs BSC
  • Improve system power losses
  • Enable a VRMS of 950 V with PD 2
  • Lower TCO cost or BOM cost

ドキュメント

デザイン リソース

開発者コミュニティ

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "コミュニティに質問する", "labelEn" : "コミュニティに質問する" }, { "link" : "https://community.infineon.com/", "label" : "すべてのディスカッションを表示", "labelEn" : "すべてのディスカッションを表示" } ] }