CY7C1049G-10VXI
Active and preferred
RoHS Compliant

CY7C1049G-10VXI

Data Sheet
package
ea.
in stock

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CY7C1049G-10VXI
CY7C1049G-10VXI
ea.
Data Sheet

Product details

  • Density
    4 MBit
  • Family
    FAST SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) range
    4.5 V to 5.5 V
  • Operating Voltage range
    4.5 V to 5.5 V
  • Organization (X x Y)
    512K x 8
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
  • Speed
    10 ns
Recommended
OPN
CY7C1049G-10VXI
Product Status active and preferred
Infineon Package
PG-SOJ-36
Package Name SOJ-36 (51-85090)
Packing Size 950
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free No
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-SOJ-36
Package Name SOJ-36 (51-85090)
Packing Size 950
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY7C1049G-10VXI is a 4-Mbit (512K × 8) asynchronous CMOS SRAM with embedded ECC for single-bit error correction. The -10 grade supports 10 ns access time and operates from 4.5 V to 5.5 V over the industrial -40°C to +85°C range. It uses CE/WE/OE control, supports 1.0 V data retention, and draws 38 mA typ operating current (45 mA max at 100 MHz). It is offered in a Pb-free 36-pin molded SOJ (V) package.

Features

  • 4-Mbit SRAM (512K × 8)
  • Embedded ECC corrects 1-bit errors
  • tAA address access down to 10 ns
  • Data retention at VCC = 1.0 V
  • Auto CE power-down (ISB2 8 mA max)
  • ICC 45 mA max at 100 MHz
  • OE to data valid tDOE 4.5 ns max
  • Inputs/outputs TTL compatible
  • I/O high-Z when deselected or OE high
  • Ambient operation –40°C to +85°C
  • DC I/O leakage ±1 µA max
  • ERR output flags ECC event (GE)

Benefits

  • ECC boosts read data integrity
  • ERR pin simplifies error monitoring
  • 10 ns access supports fast CPUs
  • Wide VCC supports multi-rail systems
  • 1.0 V retention saves backup power
  • CE power-down cuts standby dissipation
  • 45 mA max helps power budgeting
  • Fast OE access lowers read latency
  • Hi-Z outputs ease bus sharing
  • TTL levels simplify glue logic
  • –40°C to +85°C improves robustness
  • Low leakage reduces idle losses
Documents

Design resources

Partner solutions

Developer community

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