EZ-PD™ CCG7D Automotive dual-port USB-C PD + DC-DC controller

EZ-PD™ CCG7D automotive USB dual-port USB-C Power Delivery with buck-boost controller

anchor

Overview

EZ-PD™ CCG7D is a dual-port USB-C Power Delivery (PD) solution with integrated buck-boost controller. It complies with the latest USB Type-C and PD specifications (ver. 3.1) and is targeted for automotive charger applications such as head-unit chargers, rear-seat chargers, and rear-seat entertainment systems. Its high degree of integration reduces BOM and provides an optimized footprint for solutions of up to 100 W of power output per port.

Key Features

  • Supports USB PD 3.1 and PPS mode
  • Configurable resistors Rp and Rd
  • VBUS provider NFET gate driver
  • 100 mW VCONN power supply & control
  • 2x buck-boost controllers
  • 2 legacy/proprietary charging block
  • Supports QC, 2.4 A, AFC, BC 1.2
  • OVP, OCP, UVP, VBUS-to-CC, UVLO
  • 32-bit MCU 48 MHz Arm® Cortex®-M0
  • 128 KB flash, 16 KB SRAM, 32 KB ROM
  • 19 GPIOs, 4x SCBs
  • Automotive temperature range

Products

About

EZ-PD™ CCG7D MCU subsystem

EZ-PD™ CCG7S integrates a 32-bit Arm® Cortex®-M0 processor optimized to operate efficiently in low-power scenarios using extensive clock gating techniques. The subsystem integrates an interrupt controller known as the NVIC block and a wakeup interrupt controller (WIC) capable of awakening the processor from deep-sleep mode. EZ-PD™ CCG7S devices are equipped with 128 KB flash and 32 KB ROM for non-volatile storage. The ROM is primarily utilized to store libraries for authentication and device drivers, such as I2C, SPI, and others. This allocation spares the flash memory for customer features and enables the firmware upgrades necessary to comply with the latest USB power delivery specifications (v3.1) and application requirements. A 16 KB RAM can be controlled via software to store temporary statuses of system variables and parameters. The device contains a supervisory ROM containing boot and configuration routines.

EZ-PD™ CCG7D USB PD subsystem

The USB PD subsystem provides the interface to the Type-C USB port. The USB PD physical layer consists of both a transmitter and receiver which communicates BMC encoded data over the CC channel, as per the PD 3.1 standard. All communications is half-duplex. To minimize communication errors, the physical layer, or PHY, implements collision avoidance techniques. The USB PD block incorporates all termination resistors (Rp and Rd) and their respective switches as mandated by the USB PD specification. EZ-PD™ CCG7D family along with the accompanying firmware is fully compliant with revision 3.1 of the USB Power Delivery specification and supports programmable power supply (PPS) operation at all valid voltages from 3.3 V to 21 V.

Why choose EZ-PD™ CCG7D
  • Reduced BOM
  • Reduced design cycle
  • SDK for configurable value-added features
  • Programmable power supply (PPS)
  • Dynamic load sharing to distribute power between ports
  • Granular output power throttling based on VBATT and module temperature
  • Black box to store critical Type-C port parameters
  • Alternate mode support for rear seat entertainment systems
  • Authenticated field firmware upgradability

EZ-PD™ CCG7D MCU subsystem

EZ-PD™ CCG7S integrates a 32-bit Arm® Cortex®-M0 processor optimized to operate efficiently in low-power scenarios using extensive clock gating techniques. The subsystem integrates an interrupt controller known as the NVIC block and a wakeup interrupt controller (WIC) capable of awakening the processor from deep-sleep mode. EZ-PD™ CCG7S devices are equipped with 128 KB flash and 32 KB ROM for non-volatile storage. The ROM is primarily utilized to store libraries for authentication and device drivers, such as I2C, SPI, and others. This allocation spares the flash memory for customer features and enables the firmware upgrades necessary to comply with the latest USB power delivery specifications (v3.1) and application requirements. A 16 KB RAM can be controlled via software to store temporary statuses of system variables and parameters. The device contains a supervisory ROM containing boot and configuration routines.

EZ-PD™ CCG7D USB PD subsystem

The USB PD subsystem provides the interface to the Type-C USB port. The USB PD physical layer consists of both a transmitter and receiver which communicates BMC encoded data over the CC channel, as per the PD 3.1 standard. All communications is half-duplex. To minimize communication errors, the physical layer, or PHY, implements collision avoidance techniques. The USB PD block incorporates all termination resistors (Rp and Rd) and their respective switches as mandated by the USB PD specification. EZ-PD™ CCG7D family along with the accompanying firmware is fully compliant with revision 3.1 of the USB Power Delivery specification and supports programmable power supply (PPS) operation at all valid voltages from 3.3 V to 21 V.

Why choose EZ-PD™ CCG7D
  • Reduced BOM
  • Reduced design cycle
  • SDK for configurable value-added features
  • Programmable power supply (PPS)
  • Dynamic load sharing to distribute power between ports
  • Granular output power throttling based on VBATT and module temperature
  • Black box to store critical Type-C port parameters
  • Alternate mode support for rear seat entertainment systems
  • Authenticated field firmware upgradability

Documents

Documents

Design resources

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community ", "labelEn" : "Ask the community " }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions ", "labelEn" : "View all discussions " } ] }