Control communication

For a simple LonWorks distributed intelligent control networks node implementation

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Overview

Neuron™ chips are sophisticated, very large-scale integration (VLSI) devices that enable the implementation of low-cost control networking applications. They provide all the key functions necessary to intelligently process inputs from sensors and control actuator devices and propagate control information across a variety of networking media such as twisted-pair cables, power lines, and fiber optics.

Key Features

  • Three 8-bit pipelined processors
  • 11-pin programmable I/O port
  • Two 16-bit timer/counters
  • 5-pin communication port
  • Unique 48-bit ID number per device
  • Low operating current
  • 0.35 µm flash process technology
  • 5.0 V operation
  • On-chip LVD circuit
  • 2048 B of SRAM
  • 512 to 4096 B of Flash memory
  • 10 KB or 12 KB of ROM

Products

About

Neuron™ portfolio

Our top-of-the-line gate driver IC solutions are designed for precise control of MOSFETs and IGBTs, both on the high side and the low side. Trusted by industry experts, our gate driver ICs offer unmatched performance and reliability, making them the preferred choice for demanding applications. High side and low side gate drivers are essential components in power electronics systems for controlling MOSFETs and IGBTs. The high side driver is responsible for driving the upper switch (high side) of the power device, while the low side driver controls the lower switch (low side). These drivers ensure precise and synchronized switching of the power devices, enabling efficient power conversion and motor control.

Neuron™ memory usage and firmware

During the power-up of all Neuron™ chips, it is essential to have the system firmware available. For CY7C53120, this firmware is preloaded in the on-chip ROM at the factory. However, for the CY7C53150, the system firmware must be present within the first 16 KB of an external non-volatile memory such as flash, EPROM, EEPROM, or NVRAM. These devices need to be programmed using a device programmer before they are assembled onto the board. The system firmware cannot be downloaded over the network as it is responsible for implementing the network protocol. For the CY7C53120 family, the user application program is stored in the on-chip flash memory. It can be programmed onto the chip using a device programmer before the board assembly. Alternatively, it is possible to download and update the user application program over the LonTalk network using an external network management tool. As for the CY7C53150, the user application program is stored both in the on-chip flash memory and the off-chip memory. In the first instance, the user program can be programmed into the off-chip memory device using a device programmer.

Neuron™ communication ports

The Neuron™ chip incorporates a flexible 5-pin communications port that can be configured in three different ways. In Single-Ended mode, pin CP0 serves as the receiver for serial data, pin CP1 handles the transmission of serial data, and pin CP2 facilitates the connection of an external transceiver. Data communication in this mode uses Differential Manchester encoding. In Special Purpose mode, pin CP0 is designated for receiving serial data, pin CP1 is used for transmitting serial data, pin CP2 transmits a bit clock, and pin CP4 transmits a frame clock specifically for an external intelligent transceiver. In this mode, the external transceiver is responsible for encoding and decoding the data stream. Lastly, in Differential mode, pins CP0 and CP1 operate as differential receivers with programmable hysteresis and low pass filtering. Pins CP2 and CP3 function as differential drivers. Serial data is communicated using Differential Manchester encoding.

Neuron™ portfolio

Our top-of-the-line gate driver IC solutions are designed for precise control of MOSFETs and IGBTs, both on the high side and the low side. Trusted by industry experts, our gate driver ICs offer unmatched performance and reliability, making them the preferred choice for demanding applications. High side and low side gate drivers are essential components in power electronics systems for controlling MOSFETs and IGBTs. The high side driver is responsible for driving the upper switch (high side) of the power device, while the low side driver controls the lower switch (low side). These drivers ensure precise and synchronized switching of the power devices, enabling efficient power conversion and motor control.

Neuron™ memory usage and firmware

During the power-up of all Neuron™ chips, it is essential to have the system firmware available. For CY7C53120, this firmware is preloaded in the on-chip ROM at the factory. However, for the CY7C53150, the system firmware must be present within the first 16 KB of an external non-volatile memory such as flash, EPROM, EEPROM, or NVRAM. These devices need to be programmed using a device programmer before they are assembled onto the board. The system firmware cannot be downloaded over the network as it is responsible for implementing the network protocol. For the CY7C53120 family, the user application program is stored in the on-chip flash memory. It can be programmed onto the chip using a device programmer before the board assembly. Alternatively, it is possible to download and update the user application program over the LonTalk network using an external network management tool. As for the CY7C53150, the user application program is stored both in the on-chip flash memory and the off-chip memory. In the first instance, the user program can be programmed into the off-chip memory device using a device programmer.

Neuron™ communication ports

The Neuron™ chip incorporates a flexible 5-pin communications port that can be configured in three different ways. In Single-Ended mode, pin CP0 serves as the receiver for serial data, pin CP1 handles the transmission of serial data, and pin CP2 facilitates the connection of an external transceiver. Data communication in this mode uses Differential Manchester encoding. In Special Purpose mode, pin CP0 is designated for receiving serial data, pin CP1 is used for transmitting serial data, pin CP2 transmits a bit clock, and pin CP4 transmits a frame clock specifically for an external intelligent transceiver. In this mode, the external transceiver is responsible for encoding and decoding the data stream. Lastly, in Differential mode, pins CP0 and CP1 operate as differential receivers with programmable hysteresis and low pass filtering. Pins CP2 and CP3 function as differential drivers. Serial data is communicated using Differential Manchester encoding.

Documents

Documents

Design resources

Developer community

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