PSRAM – Pseudostatic RAM

HYPERRAM™ - Low pin-count, high bandwidth pSRAM memory in a small footprint

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Overview

Pseudostatic RAM (pSRAM) combines DRAM density with SRAM simplicity - no external refresh needed. Infineon’s portfolio of HYPERRAM™/Octal xSPI RAM memories offers densities ranging 64 Mb to 512 Mb with high bandwidth and low pin-count. These pSRAM chips are ideal for automotive and industrial applications requiring additional RAM for graphics, audio and data-intensive operations, as well as for battery-operated consumer and wearable devices.

Key Features

  • Small-form-factor of 6 x 8 mm
  • Lower pin-count with xSPI/HYPERBUS™
  • Energy-efficient with hybrid sleep
  • High throughput up to 800 Mbps
  • HYPERFLASH™ plus HYPERRAM™ as MCP
  • Scalable densities up to 512 Mb
  • AEC-Q100 devices with up to 125°C
  • Wide eco-system support

Products

About

Pseudostatic RAM (pSRAM) – also written as PS RAM – is a memory technology that combines the high density of DRAM with the ease-of-use of SRAM. Unlike standard DRAM, a pSRAM chip handles refresh operations internally, so the host microcontroller doesn't need to manage refresh cycles. Since the host doesn’t manage any refresh operations, the DRAM array appears to the host as static cells that retain data without refresh.

How HYPERRAM™ work as a high-performance pSRAM?

HYPERRAM™ is a pseudostatic RAM (pSRAM) solution that utilizes self-refreshing DRAM technology with a HYPERBUS™ interface. By integrating the HYPERBUS™ interface, HYPERRAM™ enables fast data transfers at a low pin-count.

HYPERRAM™ specifications:

  • Density: 64 Mb, 128 Mb, 256 Mb, 512 Mb
  • Interface: HYPERBUS™ (x8), Octal xSPI (x8), and HYPERBUS™ Extended I/O (x16)

Key features:

  • Small-form-factor FBGA package
  • Low pin-count for simplified design
  • Low power with hybrid sleep mode and partial-array-refresh
  • High read/write bandwidth 

Infineon offers two generations of HYPERRAM™ pSRAM, both industrial and automotive-qualified with JEDEC-compliant Octal xSPI and HYPERBUS™ interface:

HYPERRAM™ 2.0 is the second generation of low pin-count pSRAM from Infineon that supports throughputs of up to 400 MBps. HYPERRAM™ 2.0 products are available from 64 Mb up to 512 Mb. HYPERRAM™ 2.0 devices are available with Octal xSPI and HYPERBUS™ interface. 

HYPERRAM™ 3.0, our third-generation pSRAM product range, doubles the throughput to 800 MBps using a new, 16-bit, extended version of the HYPERBUS™ interface. 256 Mb HYPERRAM™ 3.0 products are now available in production.

HYPERBUS™ is a low signal count DDR interface that achieves high-speed read and write throughput. It utilizes a high-speed 8-bit DDR interface for both address and data along with a differential clock, a read/write latch signal, and a chip select.

HYPERBUS™ can also support external NOR flash and RAM on the same bus and works with any microcontroller with a HYPERBUS™-compatible peripheral interface. This requires only 13 pins for data transactions (12-pin HYPERBUS™ + 1 additional chip select for the second memory device).

HYPERRAM™ products achieve a far higher throughput per pin compared to competing technologies such as traditional ADMUX pSRAMs and SDR DRAMs which are based on a parallel interface. The built-in self-refresh circuitry and low-power features such as partial-array-refresh and hybrid-sleep enable lower power consumption making HYPERRAM™ apt for power-constrained applications such as wearables and IoT devices.

HYPERRAM™’ pseudostatic RAM delivers high throughput, low pin-count, smaller footprint, and energy efficiency makes it an ideal expansion memory choice for a variety of automotive, industrial, consumer, and communication applications.

  • Automotive instrument clusters

HYPERRAM™ memories provide density-scalability to meet the requirements of different instrument cluster systems. These memory devices provide an ideal solution for real-time graphics and high-speed access. The low-pin count interface also reduces design complexity and PCB size to save on design costs.

  • Industrial machine vision cameras

FPGA used in Industrial applications have limited internal RAM resources and often require low pin-count external memory for image processing. HYPERRAM™ with its lower pin-count and higher density makes it an ideal expansion memory solution.

Pseudostatic RAM (pSRAM) – also written as PS RAM – is a memory technology that combines the high density of DRAM with the ease-of-use of SRAM. Unlike standard DRAM, a pSRAM chip handles refresh operations internally, so the host microcontroller doesn't need to manage refresh cycles. Since the host doesn’t manage any refresh operations, the DRAM array appears to the host as static cells that retain data without refresh.

How HYPERRAM™ work as a high-performance pSRAM?

HYPERRAM™ is a pseudostatic RAM (pSRAM) solution that utilizes self-refreshing DRAM technology with a HYPERBUS™ interface. By integrating the HYPERBUS™ interface, HYPERRAM™ enables fast data transfers at a low pin-count.

HYPERRAM™ specifications:

  • Density: 64 Mb, 128 Mb, 256 Mb, 512 Mb
  • Interface: HYPERBUS™ (x8), Octal xSPI (x8), and HYPERBUS™ Extended I/O (x16)

Key features:

  • Small-form-factor FBGA package
  • Low pin-count for simplified design
  • Low power with hybrid sleep mode and partial-array-refresh
  • High read/write bandwidth 

Infineon offers two generations of HYPERRAM™ pSRAM, both industrial and automotive-qualified with JEDEC-compliant Octal xSPI and HYPERBUS™ interface:

HYPERRAM™ 2.0 is the second generation of low pin-count pSRAM from Infineon that supports throughputs of up to 400 MBps. HYPERRAM™ 2.0 products are available from 64 Mb up to 512 Mb. HYPERRAM™ 2.0 devices are available with Octal xSPI and HYPERBUS™ interface. 

HYPERRAM™ 3.0, our third-generation pSRAM product range, doubles the throughput to 800 MBps using a new, 16-bit, extended version of the HYPERBUS™ interface. 256 Mb HYPERRAM™ 3.0 products are now available in production.

HYPERBUS™ is a low signal count DDR interface that achieves high-speed read and write throughput. It utilizes a high-speed 8-bit DDR interface for both address and data along with a differential clock, a read/write latch signal, and a chip select.

HYPERBUS™ can also support external NOR flash and RAM on the same bus and works with any microcontroller with a HYPERBUS™-compatible peripheral interface. This requires only 13 pins for data transactions (12-pin HYPERBUS™ + 1 additional chip select for the second memory device).

HYPERRAM™ products achieve a far higher throughput per pin compared to competing technologies such as traditional ADMUX pSRAMs and SDR DRAMs which are based on a parallel interface. The built-in self-refresh circuitry and low-power features such as partial-array-refresh and hybrid-sleep enable lower power consumption making HYPERRAM™ apt for power-constrained applications such as wearables and IoT devices.

HYPERRAM™’ pseudostatic RAM delivers high throughput, low pin-count, smaller footprint, and energy efficiency makes it an ideal expansion memory choice for a variety of automotive, industrial, consumer, and communication applications.

  • Automotive instrument clusters

HYPERRAM™ memories provide density-scalability to meet the requirements of different instrument cluster systems. These memory devices provide an ideal solution for real-time graphics and high-speed access. The low-pin count interface also reduces design complexity and PCB size to save on design costs.

  • Industrial machine vision cameras

FPGA used in Industrial applications have limited internal RAM resources and often require low pin-count external memory for image processing. HYPERRAM™ with its lower pin-count and higher density makes it an ideal expansion memory solution.

Documents

Design resources

Developer community

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