EZ-PD™ CCG8 dual-single-port USB-C PD

USB-C Power Delivery (PD) solution for PC host with Extended Power Range (EPR)

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Overview

EZ-PD™ CCG8 is a dual/single-port PD 3.1-compliant USB-C controller that supports extended power range (EPR) up to 28 V without the need for any external components and up to 48 V with external components. It integrates a discrete N-channel field effect transistor (NFET) gate driver with fault protection and slew rate, a 32-bit 48 MHz Arm® Cortex®-M0+ processor, including the Type-C termination resistors Rp, Rd, and dead battery Rd termination.

Key Features

  • Compliant with USB-C and PD 3.1
  • EPR support
  • 32-bit 48 MHz Arm® Cortex® MCU
  • Integrated load switch controller
  • Slew rate controller
  • VBUS OVP. UVP, OCP, RCP, short CC
  • VBUS current sense amplifier 
  • 3:1 SBU muxes for alternate modes
  • Integrated digital & analog blocks
  • Up to 23 GPIOs
  • Four configurable SCBs
  • System fault protection

Products

About

EZ-PD™ CCG8 MCU subsystem

EZ-PD™ CCG8 features a 32-bit Arm® Cortex®-M0+ processor, specifically designed for low-power operations by implementing extensive clock gating techniques. The processor predominantly utilizes 16-bit instructions and executes a subset of the Thumb-2 instruction set. The device includes essential components such as a nested vectored interrupt controller (NVIC) block with 32 interrupt inputs, a wakeup interrupt controller (WIC) capable of waking the processor from deep-sleep mode, a 16-channel DMA/datawire block for efficient data transfer operations, and a serial wire debug (SWD) interface, serving as a two-wire variant of JTAG. EZ-PD™ CCG8 is equipped with a 256 KB flash module, 32 KB of SRAM, and 96 KB of supervisory ROM containing boot and configuration routines and a cryptographic accelerator.

EZ-PD™ CCG8 USB PD subsystem

The USB PD subsystem serves as the interface to the Type-C USB port and encompasses the USB PD physical layer block along with supporting circuits. The physical layer comprises a transmitter and receiver that facilitate the transmission of BMC-encoded data over the CC line in accordance with the PD 3.1 standard. All communication within this system is conducted in a half-duplex manner. To minimize communication errors, the physical layer (PHY) implements collision-avoidance techniques. The device incorporates two integrated VCONN FETs responsible for powering either the CC1 or CC2 pins. Additionally, there is a V5V pin for receiving power from an external power supply, which is then used to provide power to EMCA cables through the VCONN FETs. EZ-PD™ CCG8 features an 8-bit SAR ADC, which is a compact and efficient component designed for general-purpose A/D conversion applications within the chip. 

EZ-PD™ CCG8 SDK

Infineon’s ModusToolbox™ is a development environment compatible with Windows, macOS, and Linux, which brings together various device resources, middleware, and firmware necessary for application development. By utilizing ModusToolbox™, users can easily enable and configure device resources and middleware libraries, write source code in C/C++/assembly, as well as program and debug the device. The EZ-PD™ CCG8 SDK is a software development kit that simplifies the firmware development process for supported devices, eliminating the need for an in-depth understanding of the intricacies of device resources.

EZ-PD™ CCG8 MCU subsystem

EZ-PD™ CCG8 features a 32-bit Arm® Cortex®-M0+ processor, specifically designed for low-power operations by implementing extensive clock gating techniques. The processor predominantly utilizes 16-bit instructions and executes a subset of the Thumb-2 instruction set. The device includes essential components such as a nested vectored interrupt controller (NVIC) block with 32 interrupt inputs, a wakeup interrupt controller (WIC) capable of waking the processor from deep-sleep mode, a 16-channel DMA/datawire block for efficient data transfer operations, and a serial wire debug (SWD) interface, serving as a two-wire variant of JTAG. EZ-PD™ CCG8 is equipped with a 256 KB flash module, 32 KB of SRAM, and 96 KB of supervisory ROM containing boot and configuration routines and a cryptographic accelerator.

EZ-PD™ CCG8 USB PD subsystem

The USB PD subsystem serves as the interface to the Type-C USB port and encompasses the USB PD physical layer block along with supporting circuits. The physical layer comprises a transmitter and receiver that facilitate the transmission of BMC-encoded data over the CC line in accordance with the PD 3.1 standard. All communication within this system is conducted in a half-duplex manner. To minimize communication errors, the physical layer (PHY) implements collision-avoidance techniques. The device incorporates two integrated VCONN FETs responsible for powering either the CC1 or CC2 pins. Additionally, there is a V5V pin for receiving power from an external power supply, which is then used to provide power to EMCA cables through the VCONN FETs. EZ-PD™ CCG8 features an 8-bit SAR ADC, which is a compact and efficient component designed for general-purpose A/D conversion applications within the chip. 

EZ-PD™ CCG8 SDK

Infineon’s ModusToolbox™ is a development environment compatible with Windows, macOS, and Linux, which brings together various device resources, middleware, and firmware necessary for application development. By utilizing ModusToolbox™, users can easily enable and configure device resources and middleware libraries, write source code in C/C++/assembly, as well as program and debug the device. The EZ-PD™ CCG8 SDK is a software development kit that simplifies the firmware development process for supported devices, eliminating the need for an in-depth understanding of the intricacies of device resources.

Documents

Documents

Design resources

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community ", "labelEn" : "Ask the community " }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions ", "labelEn" : "View all discussions " } ] }