EZ-PD™ CCG6 one-port USB-C & PD controller

USB-C Power Delivery with integrated VBUS load switch controller

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Overview

EZ-PD™ CCG6 is a highly integrated single-port USB-C and Power Delivery controller compatible with the USB PD 3.0 specification. It supports downstream facing port (DFP), upstream facing port (UFP), and dual role port (DRP), offering a complete solution for PCs and notebooks. The controller is fully programmable and comes with a 32-bit Arm® Cortex®-M0 with 128 KB flash supporting fail-safe boot-up and firmware upgrade.

Key Features

  • Compliant with USB PD 3.0
  • Integrated digital & analog blocks
  • Up to 17 GPIOs
  • Four configurable SBCs
  • Load switch controller
  • High-voltage 21.5 V regulator
  • SBU analog mux, USB analog mux
  • VBUS-to-CC short protection
  • VBUS-to-SBU short protection
  • VCONN FETs supporting OCP
  • Legacy charge-detect block
  • System-level fault protection

Products

About

EZ-PD™ CCG6 USB-C subsystem

The USB PD subsystems of EZ-PD™ CCG6 is based on a USB PD physical layer and its supporting circuits. The PHY consists of a transmitter and a receiver that communicates BMC-encoded data over the CC channel as per the PD 3.0 specification using a half-duplex communication. Collision avoidance is employed by the physical layer or PHY to minimize communication errors on the channel. Furthermore, the USB PD block within the system incorporates all necessary termination resistors (Rp and Rd) and their corresponding switches in accordance with the USB Type-C specification. The Rp resistor is implemented as a current source and can be programmed to support the complete range of current capacity on the VBUS defined in the USB Type-C specification. Rd resistors on CC pins are essential for dead battery termination detection and charging. To comply with the latest USB PD 3.0 specification, EZ-PD™ CCG6 includes the fast role swap (FRS) feature. This functionality enables externally powered docks and hubs to rapidly transition to bus power in situations where their external power supply is disconnected. The controller supports FRS detection in Deep Sleep mode.

EZ-PD™ CCG6 MCU subsystem

EZ-PD™ CCG6 incorporates an Arm® Cortex ®-M0 CPU as part of its 32-bit MCU subsystem. This subsystem is specifically designed for efficient and low-power operation utilizing extensive clock gating techniques. The CPU is equipped with a serial wire debug (SWD) interface, which serves as a two-wire alternative to JTAG. In the debug configuration of the controller, there are four address-based break-point comparators and two data-based watchpoint comparators. EZ-PD™ CCG6 also includes a 128 KB flash module with a flash accelerator, rightly coupled with the CPU to improve the average access times from the flash block. Part of the flash module can be used to emulate EEPROM operation if required. The CPU also includes a SROM, which contains boot and configuration routines.

Why choose EZ-PD™ CCG6

EZ-PD™ CCG6 integrates various features on a single chip including a VBUS provider path load switch controller along with USB authentication support, VBUS-to-CC short protection, VBUS-to-SBU short protection, 20 V VBUS regulator, high-voltage PFET gate drivers, SBU and USB HS mux, VBUS over-voltage and over-current protection, and ESD protection. The device is a USB PD 3.0-compliant fully programmable solution supporting fast role swap.

EZ-PD™ CCG6 USB-C subsystem

The USB PD subsystems of EZ-PD™ CCG6 is based on a USB PD physical layer and its supporting circuits. The PHY consists of a transmitter and a receiver that communicates BMC-encoded data over the CC channel as per the PD 3.0 specification using a half-duplex communication. Collision avoidance is employed by the physical layer or PHY to minimize communication errors on the channel. Furthermore, the USB PD block within the system incorporates all necessary termination resistors (Rp and Rd) and their corresponding switches in accordance with the USB Type-C specification. The Rp resistor is implemented as a current source and can be programmed to support the complete range of current capacity on the VBUS defined in the USB Type-C specification. Rd resistors on CC pins are essential for dead battery termination detection and charging. To comply with the latest USB PD 3.0 specification, EZ-PD™ CCG6 includes the fast role swap (FRS) feature. This functionality enables externally powered docks and hubs to rapidly transition to bus power in situations where their external power supply is disconnected. The controller supports FRS detection in Deep Sleep mode.

EZ-PD™ CCG6 MCU subsystem

EZ-PD™ CCG6 incorporates an Arm® Cortex ®-M0 CPU as part of its 32-bit MCU subsystem. This subsystem is specifically designed for efficient and low-power operation utilizing extensive clock gating techniques. The CPU is equipped with a serial wire debug (SWD) interface, which serves as a two-wire alternative to JTAG. In the debug configuration of the controller, there are four address-based break-point comparators and two data-based watchpoint comparators. EZ-PD™ CCG6 also includes a 128 KB flash module with a flash accelerator, rightly coupled with the CPU to improve the average access times from the flash block. Part of the flash module can be used to emulate EEPROM operation if required. The CPU also includes a SROM, which contains boot and configuration routines.

Why choose EZ-PD™ CCG6

EZ-PD™ CCG6 integrates various features on a single chip including a VBUS provider path load switch controller along with USB authentication support, VBUS-to-CC short protection, VBUS-to-SBU short protection, 20 V VBUS regulator, high-voltage PFET gate drivers, SBU and USB HS mux, VBUS over-voltage and over-current protection, and ESD protection. The device is a USB PD 3.0-compliant fully programmable solution supporting fast role swap.

Documents

Documents

Design resources

Developer community

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