CY62148ESL-55ZAXI
Active and preferred
RoHS Compliant
Lead-free

CY62148ESL-55ZAXI

Datasheet
package
ea.
in stock

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

CY62148ESL-55ZAXI
CY62148ESL-55ZAXI
ea.
Datasheet

Product details

  • Density
    4 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) max
    5.5 V
  • Operating Voltage range
    2.2 V to 5.5 V
  • Organization (X x Y)
    512K x 8
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    See roadmap
  • Qualification
    Industrial
  • Speed
    55 ns
Recommended
OPN
CY62148ESL-55ZAXI
Product Status active and preferred
Infineon Package
PG-TSOP-32
Package Name STSOP-32 (51-85094)
Packing Size 1170
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TSOP-32
Package Name STSOP-32 (51-85094)
Packing Size 1170
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY62148ESL-55ZAXI is a 4-Mbit (512K × 8) CMOS asynchronous SRAM with 55 ns access for processor memory and buffering. It operates from 2.2 V to 3.6 V or 4.5 V to 5.5 V and supports automatic power-down when CE is deasserted, with 2.5 µA typical and 7 µA max standby current. Typical active current is 3.5 mA at 1 MHz. I/Os are high-Z when deselected. Supplied in a 32-pin Pb-free STSOP (ZA) industrial grade.

Features

  • 512K × 8 CMOS SRAM
  • Access time up to 55 ns
  • VCC 2.2–3.6 V or 4.5–5.5 V
  • 3.5 mA typ at 1 MHz active
  • ICC max 20 mA at fmax
  • Standby 2.5 µA typ, 7 µA max
  • Automatic CE power-down
  • 8-bit I/O with 3-state outputs
  • Supports TTL-level input interface
  • CE/OE/WE read and write control
  • tDOE 25 ns OE LOW to data valid
  • ESD > 2001 V (MIL-STD-883)

Benefits

  • 55 ns access supports fast reads
  • Fits 3.3 V or 5 V power rails
  • 2.5 µA standby extends battery
  • Auto power-down cuts idle energy
  • 3.5 mA active reduces power draw
  • 8-bit bus simplifies host design
  • 3-state I/O enables bus sharing
  • CE/OE controls ease expansion
  • TTL inputs ease legacy MCU hookup
  • 25 ns OE access lowers latency
  • High ESD improves handling yield
  • -40°C to +85°C covers harsh env

Applications

Documents

Design resources

Partner solutions

Developer community