CY7C1041G-10VXI
Active and preferred
RoHS Compliant
Lead-free

CY7C1041G-10VXI

Datasheet
package

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

CY7C1041G-10VXI
CY7C1041G-10VXI
Datasheet


Product details

  • Density
    4 MBit
  • Family
    FAST SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) range
    4.5 V to 5.5 V
  • Operating Voltage range
    4.5 V to 5.5 V
  • Organization (X x Y)
    256K x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
  • Speed
    10 ns

Recommended
OPN
CY7C1041G-10VXI
Product Status active and preferred
Infineon Package
PG-SOJ-44
Package Name SOJ-44 (51-85082)
Packing Size 510
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Country of Assembly (CoA)
TW
Country of Diffusion (CoD)
TW
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-SOJ-44
Package Name SOJ-44 (51-85082)
Packing Size 510
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
Country of Assembly (CoA)
TW
Country of Diffusion (CoD)
TW
CY7C1041G-10VXI is a 4-Mbit (256K × 16) asynchronous CMOS SRAM with embedded ECC for single-bit error correction. This 10 ns, 4.5 V to 5.5 V industrial-grade (-40°C to 85°C) device supports byte writes via BLE/BHE and provides automatic CE power-down (ISB2 8 mA max). It is offered in a Pb-free 44-pin SOJ (400 mil) package for fast processor, buffer, and general-purpose memory storage.

Features

  • 4-Mbit SRAM (256K × 16)
  • Embedded ECC single-bit correct
  • ERR pin flags corrected read errors
  • Address access time tAA 10 ns/15 ns
  • Read cycle time tRC 10 ns/15 ns
  • OE to data valid tDOE 4.5 ns max
  • Byte write/read via BHE and BLE
  • Automatic CE power-down mode
  • Data retention down to 1.0 V
  • Industrial temp -40°C to +85°C
  • TTL-compatible inputs and outputs

Benefits

  • ECC improves data integrity in SRAM
  • ERR pin enables fault monitoring
  • 10 ns access supports fast CPU buses
  • Fast tDOE reduces read latency
  • Byte enables cut bandwidth and power
  • CE power-down lowers idle current
  • 1.0 V retention keeps backup data
  • Wide temp range boosts reliability
  • TTL I/O simplifies logic interfacing

Applications

Documents

Design resources

Partner solutions

Developer community