CY62177EV30LL-55BAXI
Active and preferred
RoHS Compliant
Lead-free

CY62177EV30LL-55BAXI

High-Density 32 Mbit MoBL™ Parallel SRAM for Industrial Applications with Wide Temperature Range
Datasheet
package
ea.
in stock

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CY62177EV30LL-55BAXI
CY62177EV30LL-55BAXI
ea.
Datasheet


Product details

  • Density
    32 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.2 V to 3.6 V
  • Operating Voltage (VCCQ) max
    3.6 V
  • Organization (X x Y)
    2M x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
  • Speed
    55 ns

Recommended
OPN
CY62177EV30LL-55BAXI
Product Status active and preferred
Infineon Package
PG-TFBGA-48
Package Name FBGA-48 (51-85191)
Packing Size 2100
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Est. Longevity Date 2033
Launch Date 03/2022
Country of Assembly (CoA)
TW
Country of Diffusion (CoD)
TW,US
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TFBGA-48
Package Name FBGA-48 (51-85191)
Packing Size 2100
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
Est. Longevity Date 2033
Launch Date 03/2022
Country of Assembly (CoA)
TW
Country of Diffusion (CoD)
TW,US
ea.
in stock
CY62177EV30LL-55BAXI is a 32-Mbit CMOS SRAM organized as 2M × 16 or 4M × 8 for asynchronous read/write in battery-powered systems. It operates from 2.2 V to 3.6 V over -40°C to +85°C (industrial) with 55 ns access. Typical ICC is 10 mA at 1 MHz (18 mA max) and automatic CE power-down standby is 3 µA typical (25 µA max). Data retention is supported at 1.5 V, and the device is supplied in a 48-ball Pb-free FBGA.

Features

  • 32-Mbit SRAM, 2M×16 or 4M×8
  • 55 ns read cycle time (tRC)
  • tDOE 25 ns OE to data valid
  • 2.2 V to 3.6 V VCC operation
  • 10 mA typ active at 1 MHz
  • 3 µA typ standby (25 µA max)
  • Auto power-down when deselected
  • Power drops 99% if addr not toggle
  • 1.5 V data retention voltage (VDR)
  • 20 µA max retention current
  • Tri-state I/Os via OE/CE/BHE/BLE

Benefits

  • Fits 8- or 16-bit bus designs
  • 55 ns access supports fast CPUs
  • 25 ns OE speeds read turn-on
  • 2.2–3.6 V suits battery systems
  • 10 mA typ cuts active power
  • µA standby extends battery life
  • Auto power-down saves idle power
  • 99% drop cuts static consumption
  • Retains data at 1.5 V supply
  • Low retention current saves energy
  • Tri-state enables easy expansion

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