CY62167G-45ZXI
Active and preferred
RoHS Compliant
Lead-free

CY62167G-45ZXI

Data Sheet
package

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

CY62167G-45ZXI
CY62167G-45ZXI
Data Sheet

Product details

  • Density
    16 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    4.5 V to 5.5 V
  • Organization (X x Y)
    1M x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
Recommended
OPN
CY62167G-45ZXI
Product Status active and preferred
Infineon Package
PG-TSOP-48
Package Name TSOP-I-48 (51-85183)
Packing Size 192
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-TSOP-48
Package Name TSOP-I-48 (51-85183)
Packing Size 192
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY62167G-45ZXI is a 16-Mbit MoBL SRAM organized as 1M × 16 (or 2M × 8) with embedded ECC for single-bit error correction. It supports 45 ns access time and operates from 4.5 V to 5.5 V over -40°C to 85°C. Standby current is 5.5 µA typical (16 µA max). Dual chip enables, TTL-compatible I/O, and byte write enables (BHE/BLE) in a 48-pin TSOP I package support parallel memory expansion.

Features

  • 16-Mbit SRAM; 1M×16 or 2M×8
  • Embedded ECC single-bit correction
  • ERR output flags corrected read errors
  • 45 ns or 55 ns read cycle time
  • OE to data valid: 22 ns (45 ns)
  • Supply: 1.65–2.2 V or 4.5–5.5 V
  • Standby current max 16 µA (5 V)
  • Byte writes via BHE/BLE enables
  • Byte power-down when BHE/BLE high
  • Tri-state I/O when deselected
  • TTL-compatible inputs and outputs
  • Operating temp: –40°C to +85°C

Benefits

  • ECC improves data integrity in SRAM
  • ERR pin simplifies fault monitoring
  • 45/55 ns access supports fast CPUs
  • 22 ns OE timing reduces read wait
  • Dual VCC options ease system reuse
  • 16 µA max standby extends battery
  • Byte write saves bandwidth and power
  • Byte power-down cuts idle current
  • Tri-state outputs simplify bus sharing
  • TTL I/O eases interfacing to logic
  • –40°C to +85°C enables harsh use
  • 16-Mbit density cuts ext memory need
Documents

Design resources

Partner solutions

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community", "labelEn" : "Ask the community" }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions", "labelEn" : "View all discussions" } ] }