PSoC® 4100S Plus
Overview
PSoC 4100S Plus is a member of the PSoC 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity.
Key features:
32-Bit MCU Subsystem:
- 48-MHz Arm® Cortex®-M0+ CPU
- Up to 128KB Flash with Read Accelerator
- Up to 16KB SRAM
- 8-channel DMA engine
Programmable Analog:
- One 12-bit 1-Msps SAR ADC with differential and single-ended modes, and Channel Sequencer with signal averaging
- One single-slope 10-bit ADC provided by a capacitance sensing block
- Two opamps configurable as programmable gain amplifiers (PGAs), trans-impedance amplifiers, voltage buffers, filters, comparators, etc
- Two low-power comparators (CMPs) that operate in Deep Sleep low-power mode
- Two 7-bit current-output digital-to-analog converters (IDAC) configurable as a single 8-bit IDAC, for general-purpose or capacitive sensing
Programmable Digital:
- Programmable logic blocks allowing Boolean operations to be performed on port inputs and outputs (Smart I/O™)
Low Power 1.71V to 5.5V Operation:
- Deep Sleep mode with operational analog and 2.5 µA digital system current
Capacitive Sensing:
- Cypress CapSense Sigma-Delta (CSD) provides best-in-class signal-to-noise ratio (SNR) and water tolerance
Serial Communication:
- Five independent run-time reconfigurable Serial Communication Blocks (SCBs) with re-configurable I2C, SPI, UART, or LIN Slave functionality
- One CAN 2.0B block with support for Time-Triggered CAN (TTCAN)
Timing and Pulse-Width Modulation:
- Eight 16-bit timer/counter/pulse-width modulation (TCPWM) blocks
- Center-aligned, Edge, and Pseudo-Random modes
- Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications
LCD Drive Capability:
- LCD segment drive capability on GPIOs
Up to 54 GPIO pins:
- 40-pin QFN and 64-pin TQFP packages
Temperature Ranges:
- Automotive Electronics Council (AEC) AEC-Q100 Qualified
- A Grade: -40°C to +85°C
- S Grade: -40°C to +105°C
- E Grade: -40°C to +125°C
Development Tools:
- PSoC Creator design environment providing an Integrated Development Environment (IDE) including schematic design entry and build (with analog and digital routing)
- Industry-standard tool compatibility; after schematic entry, development can be done with Arm-based industry-standard development tools
Data Sheet:
PSoC® 4100S Plus Block Diagram
Highlights
Access to additional technical documentation:
By registering for myInfineon Collaboration Platform you can get access to additional add-on technical documentation, trainings, tools, and much more. Please follow these steps in order to get started:
- Register for myInfineon
- For AURIX documentation please send email to AURIX@infineon.com
- For Traveo documentation please email to Traveo@infineon.com
- For PSoC documentation please email to PSoC4@infineon.com
- You will receive a confirmation which explains how to use your new access
Videos
Cypress Developer Community Video Library
Demos, tutorials, and detailed lessons at your fingerprint.
Click here to discover Cypress PSoC® 4 entire Video library
Support
