Technology, topology, and isolation are different decisions

Technology

Describes how a gate driver IC transfers a signal or isolates circuitry internally.

Topology

Describes the arrangement being driven, such as low-side, half-bridge, or three-phase.

Isolation Class

Defines the electrical separation. Half-bridge can use level-shift or isolated channels.

Why Gate Driver technology matters 

Technology determines how the command reaches the output stage, which electrical domains can be bridged, and how the IC behaves during fast transients.

Technology is not topology. A half-bridge describes a circuit topology, while SOI and JI describe implementation technologies. "Isolated" refers to a system architecture, whereas Coreless Transformer is the technology EiceDRIVER™ uses to provide isolation.

Four package drawings for non-isolated, junction-isolation, silicon-on-insulator and coreless-transformer gate driver ICs, each with key specifications such as channel count, voltage rating, negative transient immunity and CMTI.

EiceDRIVER™ Gate Driver IC technologies: non-isolated low-side, junction-isolation and SOI level-shift, and coreless-transformer isolated drivers.

Coreless Transformer (CT) technology

Infineon coreless transformer (CT) technology integrates an on-chip transformer, made of metal spirals and silicon-oxide insulation, using semiconductor manufacturing processes. The transformer transmits switching information and other signals magnetically between a separate input chip and output chip, which are galvanically isolated. The output side runs from its own isolated supply referenced to the power switch.

3D illustration of two copper spiral coils on a silicon chip forming an on-chip coreless transformer.

Coreless transformer: on-chip metal spirals separated by silicon-oxide insulation transfer the switching signal across the isolation barrier.

  • 1- and 2-channel solutions
  • Functional, basic, and reinforced isolation options
  • Multiple package and family choices
  • Voltage classes up to 2300 V; isolation up to 8 kVpk (VIOTM) and up to ±2300 V functional isolation
  • UL 1577 certification (VISO = 5.7 kV rms) in selected packages; 4 mm and 8 mm creepage options

 

 

  • Galvanic separation between control and power domains

  • Common-mode transient immunity (CMTI) of more than 300 V/ns in selected families

  • Output currents up to ±18 A, reducing the need for external booster circuits

  • Short propagation delay and tight delay matching for driving SiC MOSFETs, GaN HEMTs, IGBTs and MOSFETs

  • DESAT protection
  • Active Miller clamp
  • Soft-off capability
  • TLTO functionality
  • Slew-rate control
  • I²C configurability (EiceDRIVER™ X3 Digital)
  • Monitoring and diagnostic features

 

  • Industrial drives
  • Solar (PV) and energy storage
  • UPS
  • EV charging and on-board chargers 
  • Automotive traction inverters
  • Server and telecom power supplies
  • 1- and 2-channel solutions
  • Functional, basic, and reinforced isolation options
  • Multiple package and family choices
  • Voltage classes up to 2300 V; isolation up to 8 kVpk (VIOTM) and up to ±2300 V functional isolation
  • UL 1577 certification (VISO = 5.7 kV rms) in selected packages; 4 mm and 8 mm creepage options

 

 

  • Galvanic separation between control and power domains

  • Common-mode transient immunity (CMTI) of more than 300 V/ns in selected families

  • Output currents up to ±18 A, reducing the need for external booster circuits

  • Short propagation delay and tight delay matching for driving SiC MOSFETs, GaN HEMTs, IGBTs and MOSFETs

  • DESAT protection
  • Active Miller clamp
  • Soft-off capability
  • TLTO functionality
  • Slew-rate control
  • I²C configurability (EiceDRIVER™ X3 Digital)
  • Monitoring and diagnostic features

 

  • Industrial drives
  • Solar (PV) and energy storage
  • UPS
  • EV charging and on-board chargers 
  • Automotive traction inverters
  • Server and telecom power supplies
Next step:

Explore CT-based isolated compact, enhanced, single-channel and dual-channel isolated gate driver families, transformer drivers ICs for isolated gate driver bias supplies, and solid state isolators and relays.

Isolated Gate Drivers Transformer Driver ICs Solid State Isolators Solid State Relays

Silicon-on-Insulator (SOI) technology

Infineon silicon-on-insulator (SOI) technology is a high-voltage level-shift technology. Each transistor is isolated by a buried layer of silicon dioxide, which eliminates the parasitic bipolar transistors that can cause latch-up. SOI is used in Infineon single high-side, high- and low-side, half-bridge and three-phase gate drivers. SOI does not create a galvanic barrier between input and output, so it is used where galvanic isolation is not required, for example in motor drives, home appliances and power supplies.

Illustration of a silicon wafer with a magnified cross-section showing the active area, buried SiO2 layer and substrate.

In SOI technology, a buried silicon-dioxide layer isolates the active area from the substrate.

Infineon gate drivers based on SOI technology offers:

 

  • Monolithic construction of up to six gate-drive channels, up to 1200 V.
  • An integrated PN-based bootstrap diode (36 Ω typical) that simplifies bootstrap operation and reduces PCB area.
  • Negative transient immunity of −100 V for 300 ns, which prevents latch-up.
  • Typical common-mode transient immunity (CMTI) of 50 V/ns. 
  • More than 50% lower level-shift losses, allowing higher efficiency, higher-frequency operation, smaller heat sinks and higher reliability.
  • Integrated input filters for noise immunity.

 

 

Lower level-shift losses in practice: On the same PCB, at a 300 V DC bus and 300 kHz switching with CoolMOS™ P7 MOSFETs, an EiceDRIVER™ SOI half-bridge driver (2ED2106S06F) ran 55.6 °C cooler than a standard high- and low-side driver.

Thermal camera image of a PCB with two gate driver ICs; the SOI driver area is cooler (66.6 °C maximum) than the standard driver area (122.2 °C maximum).

Thermal image on the same PCB at a 300 V DC bus and 300 kHz: EiceDRIVER™ SOI driver at 66.6 °C maximum versus 122.2 °C for a standard high- and low-side driver.

Next step:

Explore SOI level-shift high-voltage gate driver ICs for IGBTs and MOSFETs.

SOI Gate Driver ICs

Junction Isolation (JI) technology

Infineon p-n junction isolation (JI) technology is a mature, proven, industry-standard MOS/CMOS fabrication technique. Infineon’s proprietary high-voltage integrated circuit (HVIC) and latch-immune CMOS technologies allow high-voltage level-shifting circuits and low-voltage analog and digital circuits on one monolithic chip. The HVIC process integrates bipolar, CMOS and lateral DMOS devices with breakdown voltages above 700 V and 1400 V for operating offset voltages of 600 V and 1200 V. Because JI is a level-shift technology rather than a galvanic barrier, negative switch-node transients must stay within the device limits.

Infineon’s JI technology based gate drivers offer:

  • Monolithic construction of 1 to 6 gate-drive channels, up to 1200 V (voltage classes 100 V, 120 V, 200 V, 500 V, 600 V and 1200 V).

  • High output-current capability (4 A).

  • Precision analog circuitry with tight timing and propagation delay.

  • An optional integrated bootstrap FET (200 Ω typical) in selected products. 

  • Negative transient immunity of −40 V for 100 ns and typical CMTI of 50 V/ns.

  • Two generations: Gen 2 (IR prefix, the original HVIC process) and Gen 5 (IRS prefix, cost-effective pin-to-pin versions of Gen 2).

Die photograph of a junction-isolation gate driver IC showing high-side circuitry inside polysilicon rings and low-side circuitry, next to device cross-sections of the LDMOS level shift, high-voltage floating CMOS and grounded CMOS.

Top view of a JI gate driver IC (left) and cross-section of the high-voltage integrated circuit (right).

Next step:

Explore JI level-shift high-voltage gate driver ICs for IGBTs and MOSFETs.

JI Gate Driver ICs

Non-isolated (N-ISO) and Truly Differential Input (TDI) technology

A non-isolated driver shares an electrical reference with its input logic and the switch source or emitter. It is well suited to ground-referenced low-side drive or systems where isolation is provided elsewhere. TDI variants respond to the difference between two input pins, improving tolerance to local reference movement within the specified common-mode range. 

Infineon non-isolated drivers are monolithic ground-referenced drivers built on the rugged HVIC process or a 130 nm process. The portfolio includes single- and dual-channel low-side drivers with options for output current, logic configuration and UVLO, in DSO-8 and small SOT23, WSON and TSNP packages, and families with overcurrent protection and fault reporting, for example 1ED4417x with ±5% OCP threshold tolerance. Truly differential input (TDI) drivers such as 1EDN-TDI tolerate ground shifts of ±70 V DC and ±150 V AC, which prevents false triggering of power MOSFETs. These drivers are used in power supplies, home appliances, BLDC motor drives, industrial automation and other applications where galvanic isolation is not required.

Next step:

Compare non-isolated ground-referenced and TDI solutions.

Low-side Gate Drivers

Technology comparison

Chart of voltage class from 25 V to 2300 V against power level from 2.5 kW to 200 kW, showing low-side and TDI non-isolated drivers at the bottom, SOI and JI level-shift drivers up to 1200 V and coreless-transformer isolated drivers up to 2300 V.

Voltage class and typical power level covered by each EiceDRIVER™ technology.

Values are typical or maximum values of selected product families. Always check the current datasheet.

How to choose the technology

  • If galvanic isolation is mandatory, evaluate CT isolated drivers and the isolated bias-supply architecture.
  • If no galvanic barrier is needed but the switch is floating, evaluate SOI or JI level-shift solutions.
  • If the switch is ground-referenced, evaluate N-ISO or TDI devices.
  • Then refine the choice using voltage class, channel count, source/sink current, delay, CMTI, UVLO, package, qualification, and required features.
Next step:

Apply isolation type filter to find products from the correct technology.

Compare CT, SOI, JI, and N-ISO products

Representative EiceDRIVER™ isolated family positioning

Next step:

Review full-bridge transformer drivers for isolated gate-driver bias supplies.

Explore Transformer Driver ICs

Explore the Gate Driver ICs catalogue

Recommended documents

Frequently asked questions EiceDRIVER™ Gate Drivers

What are the main EiceDRIVER™ Gate Driver technologies? 

The portfolio is organized around Coreless Transformer isolated technology, Silicon-on-Insulator level-shift technology, Junction Isolation level-shift technology, and non-isolated ground-referenced technology. 

No. SOI electrically isolates active devices within the IC and supports high-voltage level shifting, but it does not create a galvanic safety barrier between the input and output domains. 

Both can implement monolithic high-voltage level shifting. SOI isolates active devices with an insulating layer, while JI uses semiconductor junctions. Their transient behavior, losses, integration options, ratings, and product positioning can differ by device. 

Choose an isolated Coreless Transformer driver when the system architecture, safety standard, working voltage, grounding scheme, noise environment, or transient environment requires galvanic separation. 

CMTI is immunity to fast common-mode voltage transients. It is a key parameter for isolated and level-shift drivers operating with fast switch-node edges. 

The input and output share an electrical reference; there is no galvanic barrier inside the driver. 

No. It means the input and output share a reference. The applicable supply and bus-voltage limits depend on the specific architecture and device. 

A truly differential input responds to the voltage difference between two input pins and can improve tolerance to ground bounce or local reference movement within its specified range. 

Yes. Both technologies are used in level-shift gate drivers that control floating high-side switches, typically with a bootstrap or another floating supply. 

A high-voltage integrated circuit (HVIC) gate driver combines high-voltage level-shifting circuits and low-voltage analog and digital circuits on one monolithic chip. Infineon JI drivers use HVIC technology with breakdown voltages above 700 V and 1400 V for 600 V and 1200 V operating offsets.

IR denotes Gen 2 high-voltage driver ICs based on the original HVIC process; IRS denotes Gen 5, cost-effective pin-to-pin versions of Gen 2.

In inverters with high load current, parasitic inductance makes the switch-node (VS) voltage swing below the negative DC bus. If this exceeds the driver’s limits, the high-side output can flip or the IC can latch up. Infineon SOI drivers withstand −100 V for 300 ns.