Active and preferred
RoHS Compliant
Lead-free

S29GL512T12DHVV10

Data Sheet
package
software

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

S29GL512T12DHVV10
S29GL512T12DHVV10
Data Sheet

Product details

  • Density
    512 MBit
  • Family
    GL-T
  • Initial Access Time
    120 ns
  • Interface Frequency (SDR/DDR) (MHz)
    NA
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature
    -40 °C to 105 °C
  • Operating Voltage
    3 V
  • Page Access Time
    15 ns
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Industrial
Recommended
OPN
S29GL512T12DHVV10
Product Status active and preferred
Infineon Package
PG-LFBGA-64
Package Name FBGA-64 (002-15537)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-LFBGA-64
Package Name FBGA-64 (002-15537)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S29GL512T12DHVV10 is a 512 Mb (64 MB) parallel MIRRORBIT™ flash memory for embedded and automotive systems. It features asynchronous random access times as fast as 100 ns and page access down to 15 ns, with I/O voltage from 1.65 V to 3.6 V. Supporting ×8/×16 data bus and 512-byte write buffer programming, it offers uniform 128 KB sector erase and up to 100,000 cycles. Operating from –40°C to +125°C, it meets AEC-Q100 automotive grade and offers 20-year data retention.

Features

  • 45-nm MIRRORBIT™ technology
  • Single supply for read/program/erase
  • Versatile I/O voltage (1.65 V to VCC)
  • ×8/×16 data bus
  • 512-byte programming buffer
  • Hardware ECC with single bit correction
  • Uniform 128-KB sectors
  • Advanced sector protection (ASP)
  • 100,000 program/erase cycles per sector
  • 20-year data retention (typical)
  • Power-up and low VCC write inhibit
  • Status Register, Data Polling, Ready/Busy pin

Benefits

  • High density for embedded applications
  • Flexible I/O supports various host systems
  • Fast programming with 512-byte buffer
  • Reliable data with built-in ECC
  • Simplifies memory management with uniform
  • Enhanced data security with ASP
  • Long device lifetime, 100K cycles per sector
  • Retains data up to 20 years
  • Prevents accidental writes during power
  • Easy status monitoring and diagnostics

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community", "labelEn" : "Ask the community" }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions", "labelEn" : "View all discussions" } ] }