Please note that this is an end of life product. See newer alternative product version Please note that this is an end of life product. See newer alternative product version
View replacement
END OF LIFE
discontinued
RoHS Compliant

S29GL256P90TFCR23

END OF LIFE
Data Sheet
package
software
View replacement

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

S29GL256P90TFCR23
S29GL256P90TFCR23
View replacement
Data Sheet

Product details

  • Density
    256 MBit
  • Family
    GL-P
  • Initial Access Time
    90 ns
  • Interface Frequency (SDR/DDR) (MHz)
    NA
  • Interfaces
    Parallel
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature
    0 °C to 85 °C
  • Operating Voltage
    3 V
  • Page Access Time
    25 ns
  • Peak Reflow Temp
    260 °C
  • Qualification
    Commercial
OPN
S29GL256P90TFCR23
Product Status discontinued
Infineon Package
PG-TSOP-56
Package Name TSOP-56 (002-15549)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
View replacement

Product Status discontinued
Infineon Package
PG-TSOP-56
Package Name TSOP-56 (002-15549)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
View replacement
The S29GL256P90TFCR23 is a 256 Mbit, 3.0 V page-mode Flash memory using 90 nm MirrorBit® technology for embedded systems needing high density and reliability. It features 90 ns random access, 64 Kword (128 Kbyte) uniform sectors, and VersatileIO™ for I/O voltages from 1.65 V to VCC. The device supports single word or 32-word buffer programming, advanced sector protection, and a secured silicon sector. It operates from -40°C to +85°C.

Features

  • 90 nm MirrorBit process technology
  • Single 3 V read/program/erase operation
  • VersatileIO control (1.65 V to VCC I/O)
  • 32-word/64-byte write buffer
  • 8-word/16-byte page read buffer
  • Uniform 64 Kword/128 Kbyte sectors
  • 128-word/256-byte Secured Silicon Sector
  • Advanced sector protection methods
  • Program/Erase Suspend and Resume
  • Hardware data protection (WP#/ACC, VCC)
  • Write pulse glitch protection
  • 100,000 erase cycles per sector (typical)

Benefits

  • High density for embedded storage needs
  • Low voltage reduces power consumption
  • Flexible I/O for easy system integration
  • Fast programming with write buffer
  • Page read buffer speeds up data access
  • Simplifies memory management
  • Secure area for permanent IDs
  • Protects data from accidental changes
  • Suspend/resume boosts system efficiency
  • Hardware protection prevents data loss
  • Glitch protection ensures data integrity
  • High endurance for long device life

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community", "labelEn" : "Ask the community" }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions", "labelEn" : "View all discussions" } ] }