Active and preferred
RoHS Compliant
Lead-free

S25HL02GTDPBHB050

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S25HL02GTDPBHB050
S25HL02GTDPBHB050

Product details

  • Classification
    ISO 26262-compliant
  • Density
    2 GBit
  • Family
    HL-T
  • Interface Bandwidth
    66 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 66
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature
    -40 °C to 105 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2037
  • Qualification
    Automotive
OPN
S25HL02GTDPBHB050
Product Status active and preferred
Infineon Package
Package Name FBGA-24 (002-24801)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name FBGA-24 (002-24801)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25HL02GTDPBHB050 is a 2 Gb SEMPER™ NOR Flash based on Infineon's 45-nm MIRRORBIT™ technology in a dual-die package. It features a Quad SPI interface up to 102 MBps (DDR, 102 MHz), operates at 2.7 V to 3.6 V, and is AEC-Q100 Grade 1 qualified (-40°C to +125°C). Key features include ISO 26262 ASIL B compliance, Endurance flex, ECC (SECDED), advanced sector protection, SafeBoot, and a minimum 2,560,000 program-erase cycles for robust data integrity.

Features

  • Embedded ECC corrects 1-bit, detects 2-bit
  • Endurance flex: configurable wear leveling
  • Hardware CRC for data integrity check
  • Multiple data protection: LBP, ASP, SSR
  • SafeBoot for microcontroller failure recovery
  • Quad SPI, Dual I/O, QPI, SDR/DDR support
  • Page programming up to 512 bytes
  • Suspend/resume for program/erase ops
  • Four reset methods: hardware, POR, CS#, SW
  • Deep power down mode for low standby current
  • Wide VCC: HL-T 2.7–3.6 V, HS-T 1.7–2.0 V
  • Industrial temperature: –40°C to +85°C

Benefits

  • ECC ensures reliable data storage and reads
  • Wear leveling extends flash memory lifespan
  • CRC enables fast integrity verification
  • Flexible protection prevents accidental data
  • SafeBoot allows device recovery after faults
  • High-speed interfaces boost data throughput
  • Large page programming improves efficiency
  • Suspend/resume enables system responsiveness
  • Multiple resets enhance system robustness
  • DPD mode reduces power for battery devices
  • Supports broad supply and application needs
  • Operates reliably in harsh environments

Applications

Documents

Design resources

Developer community

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