Active and preferred
RoHS Compliant
Lead-free

S25FS064SAGMFB011

Data Sheet
package
software

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S25FS064SAGMFB011
S25FS064SAGMFB011
Data Sheet

Product details

  • Classification
    ISO 26262-ready
  • Density
    64 MBit
  • Family
    FS-S
  • Interface Bandwidth
    66 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / -
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature
    -40 °C to 105 °C
  • Operating Voltage
    1.8 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Automotive
Recommended
OPN
S25FS064SAGMFB011
Product Status active and preferred
Infineon Package
PG-DSO-8
Package Name SOIC-8 (002-15548)
Packing Size 1365
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-DSO-8
Package Name SOIC-8 (002-15548)
Packing Size 1365
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25FS064SAGMFB011 is a 64 Mb (8 MB) serial NOR flash memory using Infineon's 65-nm MIRRORBIT™ technology and Eclipse architecture for improved program and erase performance. Operating from 1.7 V to 2.0 V, it supports SPI Multi-I/O with single, dual, quad, and DDR modes up to 133 MHz. Flexible sector architectures, up to 512-byte page programming, robust data protection, and advanced security features enable reliable code storage.

Features

  • SPI with single, dual, quad, and QPI modes
  • Double data rate (DDR) read commands
  • 256/512-byte page programming buffer
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles minimum
  • 20 year data retention minimum
  • 1024-byte OTP array with lockable regions
  • Automatic ECC with single bit error
  • Advanced sector and block protection
  • 65-nm MIRRORBIT™ technology
  • 1.7 V to 2.0 V supply voltage
  • Operating temperature up to +125°C

Benefits

  • Flexible I/O enables high-speed data access
  • DDR read boosts system performance
  • Large buffer accelerates programming
  • Multiple erase modes fit various needs
  • High endurance for reliable operation
  • Long retention secures critical data
  • OTP array supports secure device ID
  • ECC improves data integrity
  • Robust protection prevents data loss
  • Advanced process enables high density
  • Low voltage reduces power consumption
  • Wide temp range suits harsh environments

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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