Active and preferred
RoHS Compliant
Lead-free

S25FL128SAGBHVC03

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S25FL128SAGBHVC03
S25FL128SAGBHVC03

Product details

  • Density
    128 MBit
  • Family
    FL-S
  • Interface Bandwidth
    52 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / -
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature
    -40 °C to 105 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Industrial
OPN
S25FL128SAGBHVC03
Product Status active and preferred
Infineon Package
Package Name FBGA-24 (002-15534)
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name FBGA-24 (002-15534)
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25FL128SAGBHVC03 is a 128 Mb SPI Multi-I/O NOR flash using 65-nm MIRRORBIT™ technology and Eclipse architecture. Operating from 2.7 V to 3.6 V core and 1.65 V to 3.6 V I/O, it achieves up to 52 MBps Quad read and 80 MBps Quad DDR read rates. Key features include hybrid sector options, 100,000 program-erase cycles, advanced sector protection, and AEC-Q100 automotive qualification to 125°C. Typical uses are code shadowing, XIP, and automotive data storage.

Features

  • MIRRORBIT™ technology stores 2 bits per cell
  • Eclipse architecture for fast program/erase
  • SPI Multi-I/O: x1, x2, x4 data width support
  • SDR and DDR read modes up to 80 MBps
  • Page programming buffer: 256B/512B options
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles minimum
  • 20-year data retention minimum
  • 1024-byte One-Time Programmable (OTP) area
  • Advanced sector and block protection features
  • Core voltage: 2.7 V to 3.6 V, I/O: 1.65 V to
  • Operating temp: –40°C to +125°C

Benefits

  • High density, reliable code and data storage
  • Fast erase/program boosts system performance
  • Flexible I/O supports wide host compatibility
  • High-speed read enables XIP applications
  • Efficient page buffer speeds up programming
  • Multiple erase options ease legacy migration
  • Long endurance reduces maintenance needs
  • Data retention ensures long-term reliability
  • OTP region enhances system security
  • Robust protection prevents data corruption
  • Wide voltage range fits diverse systems
  • Broad temp range suits harsh environments

Applications

Documents

Design resources

Developer community

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