Active and preferred
RoHS Compliant
Lead-free

IRS2008S

200 V half-bridge gate driver IC with shutdown and VCC & VBS UVLO ensuring reliable start-up operation
Data Sheet
package
board
ea.
in stock

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IRS2008S
IRS2008S
ea.
Data Sheet

Product details

  • Channels
    2
  • Configuration
    Half Bridge
  • Input Vcc
    10 V to 20 V
  • Isolation Type
    Functional levelshift JI (Junction Isolated)
  • Output Current (Source)
    0.29 A
  • Output Current (Sink)
    0.6 A
  • Package
    SOIC 8N
  • Qualification
    Industrial
  • Turn Off Propagation Delay
    150 ns
  • Turn On Propagation Delay
    680 ns
  • VBS UVLO (Off)
    8.2 V
  • VBS UVLO (On)
    8.9 V
  • VCC UVLO (Off)
    8.2 V
  • VCC UVLO (On)
    8.9 V
  • Voltage Class
    200 V
Recommended
OPN
IRS2008STRPBF
Product Status active and preferred
Infineon Package
SOIC 8N
Package Name N/A
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 2
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
SOIC 8N
Package Name -
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 2
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
EiceDRIVER™ 200 V half-bridge gate driver IC with typical 0.29 A source and 0.6 A sink currents in 8-Lead SOIC package for MOSFETs. It is a levelshift junction-isolated driver with high and low side referenced outputs. The logic input is compatible with standard CMOS or LSTTL output. The output drivers feature a high pulse current buffer stage and the floating channel can be used to drive an N-channel power MOSFET in the high side configuration.

Features

  • Up to 20 V per channel
  • Under voltage lockout for Vcc, VBS
  • 3.3, 5, 15 V input logic compatible
  • Tolerant to neg. transient volt.
  • Designed for bootstrap power suppl.
  • Cross-conduction prevention logic
  • Matched prop. delay for both chan.
  • Internal set dead time
  • Highside output in phase with input
  • Shutdown input turns off both chan.
  • -40°C to 125°C operating range
  • CMOS technologies

Documents

Documents

Design resources

Partner solutions

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{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community", "labelEn" : "Ask the community" }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions", "labelEn" : "View all discussions" } ] }