IPD088N06N3 G
not for new design
RoHS Compliant

IPD088N06N3 G

Multiple OPNs available

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.



Product details

  • Budgetary Price €/1k
    0.32
  • Ciss
    2900 pF
  • Coss
    640 pF
  • ID (@25°C) max
    50 A
  • IDpuls max
    200 A
  • Operating Temperature range
    -55 °C to 175 °C
  • Package
    DPAK (TO-252)
  • Polarity
    N
  • Ptot max
    71 W
  • QG (typ @10V)
    36 nC
  • RDS (on) (@10V) max
    8.8 mΩ
  • Rth
    2.1 K/W
  • VDS max
    60 V
  • VGS(th) range
    2 V to 4 V
  • VGS(th)
    3 V

OPN
IPD088N06N3GATMA1 IPD088N06N3GBTMA1
Product Status not for new design discontinued
Infineon Package
Package Name DPAK DPAK
Packing Size 2500 2500
Packing Type TAPE & REEL TAPE & REEL
Moisture Level 1 1
Moisture Packing NON DRY NON DRY
Lead-free No No
Halogen Free Yes No
RoHS Compliant Yes Yes
Country of Assembly (CoA)
MY
MY
Country of Diffusion (CoD)
MY
AT

Product Status not for new design
Infineon Package
Package Name DPAK
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 1
Moisture Packing NON DRY
Lead Free
Halogen Free
RoHS Compliant
Country of Assembly (CoA)
MY
Country of Diffusion (CoD)
MY

Product Status discontinued
Infineon Package
Package Name DPAK
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 1
Moisture Packing NON DRY
Lead Free
Halogen Free
RoHS Compliant
Country of Assembly (CoA)
MY
Country of Diffusion (CoD)
AT
OptiMOS™ 60V is a perfect choice for synchronous rectification in switched mode power supplies (SMPS) such as those found in servers and desktops and tablet charger. In addition these devices can be used for a broad range of industrial applications including motor control, solar micro inverter and fast switching DC-DC converter.

Features

  • Charge x RDS(on)product (FOM)
  • Low on-resistance R DS(on)
  • Ideal for fast switching applications
  • RoHS compliant - halogen free
  • MSL1 rated

Benefits

  • Highest system efficiency
  • Less paralleling required
  • Increased power density
  • System cost reduction
  • Very low voltage overshoot
Documents

Design resources

Developer community