Active and preferred
RoHS Compliant
Lead-free

CY8C4147LQS-S285

Data Sheet
package
ea.
in stock

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

CY8C4147LQS-S285
CY8C4147LQS-S285
ea.
Data Sheet

Product details

  • ADC (#, Max. Resolution @ Sample Rate)
    SAR (1, 12-bit @ 1 msps)
  • CapSense
    No
  • Classification
    ISO 26262-ready
  • Comparators
    2
  • CPU
    ARM Cortex-M0+
  • Family
    PSOC™ Automotive 4100S Plus
  • Flash
    128 kByte
  • Frequency max
    48 MHz
  • GPIOs
    54
  • LCD Direct Drive
    Yes
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 105 °C
  • Operating Voltage range
    1.71 V to 5.5 V
  • Operational Amplifier
    2
  • Peak Reflow Temp
    260 °C
  • Smart IOs
    24
  • SRAM
    16 kByte
  • Universal Digital Blocks
    0
  • USB Type
    None
Recommended
OPN
CY8C4147LQSS285XQLA1
Product Status active and preferred
Infineon Package
PG-VQFN-64
Package Name WQFN-64 (002-31760)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-VQFN-64
Package Name WQFN-64 (002-31760)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
The CY8C4147LQS-S285 is an automotive microcontroller from the PSOC™ 4100S Plus family, featuring a 48 MHz ARM Cortex-M0+ CPU, 128 KB flash, and 16 KB SRAM. Operating from 1.71 to 5.5 V across -40 to 105°C, it offers 54 GPIOs and 24 Smart IOs. Integrated analog blocks include a 12-bit SAR ADC (1 Msps), two operational amplifiers, and two comparators. LCD direct drive is supported. ISO 26262-ready, RoHS compliant, and halogen free, it is designed for automotive reliability.

Features

  • 48 MHz Arm Cortex-M0+ CPU
  • Up to 128 KB flash with Read Accelerator
  • Up to 16 KB SRAM, 8-channel DMA engine
  • 12-bit 1 Msps SAR ADC, differential/single-en
  • Two opamps, Deep Sleep operation
  • Two low-power comparators, Deep Sleep mode
  • Five SCBs: I2C, SPI, UART, LIN support
  • CAN 2.0B, ISO-11898-1 compliant
  • 8x 16-bit timer/counter/PWM blocks
  • CAPSENSE CSD, >5:1 SNR, water tolerance
  • LCD segment drive on GPIOs
  • Deep Sleep mode, 2.5 μA digital current

Benefits

  • 48 MHz CPU enables responsive control
  • Fast flash/SRAM improves code execution
  • DMA reduces CPU load for data transfer
  • 12-bit ADC delivers accurate sensing
  • Opamps/comparators support analog designs
  • Deep Sleep cuts power in standby
  • Multiple SCBs simplify connectivity
  • CAN supports robust in-vehicle networks
  • PWM/timers enable precise motor control
  • CAPSENSE enables reliable touch input
  • LCD drive simplifies display integration
  • Ultra-low power extends battery life

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community", "labelEn" : "Ask the community" }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions", "labelEn" : "View all discussions" } ] }