CY62157EV30LL-45ZSXAT
Active and preferred
RoHS Compliant

CY62157EV30LL-45ZSXAT

Data Sheet
package

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CY62157EV30LL-45ZSXAT
CY62157EV30LL-45ZSXAT
Data Sheet

Product details

  • Density
    8 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn;Ni/Pd/Au
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) max
    3.6 V
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    512K x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Automotive
  • Speed
    45 ns
Recommended
OPN
CY62157EV30LL-45ZSXAT
Product Status active and preferred
Infineon Package
PG-TSOP-44
Package Name TSOP-II-44 (51-85087)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free No
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-TSOP-44
Package Name TSOP-II-44 (51-85087)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY62157EV30LL-45ZSXAT is an 8-Mbit (512K × 16) CMOS SRAM in a Pb-free 44-pin TSOP II package for Automotive-A use. It operates from 2.20 V to 3.60 V over –40°C to +85°C and delivers 45 ns access. Ultra-low power includes 6 mA typical active current at 1 MHz and 2 µA typical standby with automatic power-down when addresses are not toggling. It supports byte enables (BHE/BLE) and CE1/CE2 for easy memory expansion.

Features

  • 8-Mbit SRAM, 512K × 16
  • Configurable 512K×16 or 1M×8
  • 45 ns read cycle time (tRC)
  • 22 ns OE to data valid (tDOE)
  • 2.20 V to 3.60 V VCC range
  • 2 µA typ standby current (ISB)
  • 6 mA typ active at 1 MHz
  • Auto power-down when deselected
  • Byte enables BHE/BLE for 8-bit
  • High-Z outputs when deselected
  • Data retention at 1.5 V VDR
  • 10 pF max input/output capacitance

Benefits

  • 8-Mbit density saves board space
  • 1M×8 option eases bus matching
  • 45 ns access supports fast CPUs
  • 22 ns OE enables quick reads
  • 2.2–3.6 V fits common rails
  • 2 µA standby extends battery life
  • 6 mA active cuts run power
  • Auto power-down reduces idle drain
  • Byte writes avoid read-modify-write
  • High-Z I/O simplifies bus sharing
  • 1.5 V retention keeps data in sleep
  • 10 pF I/O eases signal integrity
Documents

Design resources

Partner solutions

Developer community

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