CY62136FV30LL-45ZSXIT
Active and preferred
RoHS Compliant
Lead-free

CY62136FV30LL-45ZSXIT

ea.
in stock

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CY62136FV30LL-45ZSXIT
CY62136FV30LL-45ZSXIT
ea.

Product details

  • Density
    2 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Ni/Pd/Au
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) max
    3.6 V
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    128K x 16
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
  • Speed
    45 ns
OPN
CY62136FV30LL-45ZSXIT
Product Status active and preferred
Infineon Package
Package Name TSOP-II-44 (51-85087)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
ea. in stock

Product Status
Active
Infineon Package
Package Name TSOP-II-44 (51-85087)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY62136FV30LL-45ZSXIT is a 2-Mbit (128K × 16) CMOS static RAM with a 45 ns speed grade and automatic power-down to cut standby current when CE is deselected. It operates from 2.2 V to 3.6 V and supports Industrial/Automotive-A temperature range of –40°C to +85°C. The device is available in a Pb-free 44-pin TSOP II (ZS) package for low-power portable and embedded memory expansion.

Features

  • 2-Mbit SRAM, 128K × 16
  • 45 ns read/write cycle time
  • OE access time down to 22 ns
  • Supply voltage 2.2 V to 3.6 V
  • ICC typ 1.6 mA at 1 MHz
  • ICC max 18 mA at fmax
  • Standby current typ 1 µA
  • Auto power-down with CE HIGH
  • Byte write enables BLE/BHE
  • Outputs go high-Z when disabled
  • Input/output leakage ±1 µA
  • CIN/COUT max 10 pF

Benefits

  • Fits 16-bit data SRAM needs
  • Fast reads/writes reduce latency
  • Faster OE speeds async reads
  • Runs from 2.2–3.6 V rails
  • Low active current saves energy
  • Handles high-frequency accesses
  • Extends battery life in standby
  • Cuts idle power when inactive
  • Updates 8-bit bytes, less traffic
  • Simplifies bus sharing
  • Low leakage improves data hold
  • Low pin capacitance eases timing

Applications

Documents

Design resources

Developer community

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