CY62136EV30LL-45BVXIT
Active and preferred
RoHS Compliant

CY62136EV30LL-45BVXIT

Datasheet
package
ea.
in stock

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CY62136EV30LL-45BVXIT
CY62136EV30LL-45BVXIT
ea.
Datasheet


Product details

  • Density
    2 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    128K x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial

Recommended
OPN
CY62136EV30LL-45BVXIT
Product Status active and preferred
Infineon Package
PG-VFBGA-48
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-VFBGA-48
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY62136EV30LL-45BVXIT is a 2-Mbit (128K × 16) CMOS SRAM in the CY621 MoBL family, specified for 45 ns access. It operates from 2.2 V to 3.6 V over -40°C to +85°C. Active supply current is 2 mA typ at 1 MHz, and 15 mA typ (20 mA max) at fmax. Automatic CE power-down reduces standby to 1 µA typ (7 µA max). Byte enables (BHE/BLE) support 8-bit writes. Package: 48-ball Pb-free VFBGA (BV).

Features

  • 128K 6 16 CMOS SRAM
  • 45 ns read/write cycle time
  • VCC operating 2.20 V to 3.60 V
  • 1 cA typ standby current
  • 7 cA max standby current
  • 2 mA typ at 1 MHz active current
  • Automatic CE power-down current
  • 16-bit I/O with BLE/BHE byte enables
  • Tri-state outputs via CE/OE control
  • Data retention at VCC = 1.0 V
  • ICCDR 3 cA max at VCC = 1.0 V
  • OE LOW to data valid 22 ns max

Benefits

  • 45 ns access cuts wait states
  • 2.2 3.6 V fits 3 V rails
  • 1 cA standby extends battery life
  • 7 cA max helps low-power design
  • 2 mA at 1 MHz reduces energy use
  • CE power-down saves idle power
  • Byte enables support partial writes
  • Tri-state enables bus sharing
  • 1.0 V retention preserves contents
  • Low ICCDR reduces backup current
  • 22 ns OE speeds read enable timing
  • 16-bit bus boosts data throughput

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