CY22050KFZXC
Active
RoHS Compliant

CY22050KFZXC

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CY22050KFZXC
CY22050KFZXC

Product details

  • Category
    Programmable Clocks
  • Core/IO Operating Voltages ((V))
    3.3
  • Features
    Universal Programmable Clock Generator with VCXO and Spread Spectrum
  • I/O Voltage ((V))
    2.5/3.3
  • Input Frequency range
    1 MHz to 133 MHz
  • Input Type
    Xtal/LVCMOS/LVTTL
  • Lead Ball Finish
    Pure Sn
  • On-chip Clock Generation (PLL)
    1
  • Operating Temperature range
    0 °C to 70 °C
  • Operating Voltage range
    3.13 V to 3.45 V
  • Output Frequency range
    0.08 MHz to 200 MHz
  • Output Signal Type
    CMOS
  • Outputs
    6
  • Peak Reflow Temp
    260 °C
  • Publish in NPSG
    N
  • Publish in PSG
    Y
  • Qualification
    Commercial
  • Spread Spectrum
    N
OPN
CY22050KFZXC
Product Status active
Infineon Package
Package Name TSSOP-16 (51-85091)
Packing Size 1920
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name TSSOP-16 (51-85091)
Packing Size 1920
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The CY22050KFZXC is a universal programmable clock generator with one integrated PLL, supporting up to six CMOS outputs in a 16-pin TSSOP package. It operates from a 3.135 V to 3.465 V supply, accepts 1 MHz to 133 MHz LVCMOS/LVTTL/crystal inputs, and delivers 0.08 MHz to 200 MHz outputs. Flash-programmable, with 2.5 V/3.3 V output options, commercial 0°C to 70°C range, and RoHS compliance.

Features

  • Integrated phase-locked loop (PLL)
  • Flash and field programmable
  • Up to 6 configurable outputs
  • Low-skew, low-jitter, high accuracy
  • Programmable via PC software
  • Crosspoint switch matrix for outputs
  • Multiple divider and post-divider
  • Supports 8–30 MHz crystal or 1–133 MHz
  • Reference oscillator on-chip
  • Output enable and power down pins
  • Reprogrammable up to 100 times
  • JEDEC file support for programming

Benefits

  • Flexible clock generation for various
  • Easy design changes and updates
  • Drives multiple devices with one chip
  • Reliable timing for high-performance
  • Simple configuration with user software
  • Custom output mapping reduces board
  • Wide divider options fit many
  • Compatible with standard crystals
  • No external oscillator needed
  • Power saving with output enable/power
  • Reduces inventory risk
  • Streamlined production via JEDEC files

Applications

Documents

Design resources

Developer community

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