Active and preferred
RoHS Compliant
Lead-free

S79FL512SDSMFBG01

Data Sheet
package
software
ea.
in stock

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S79FL512SDSMFBG01
S79FL512SDSMFBG01
ea.
Data Sheet

Product details

  • Density
    512 MBit
  • Family
    FL-S
  • Interface Bandwidth
    160 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 80
  • Interfaces
    Dual-Quad SPI
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature
    -40 °C to 105 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    See roadmap
  • Qualification
    Automotive
Recommended
OPN
S79FL512SDSMFBG01
Product Status active and preferred
Infineon Package
PG-DSO-16
Package Name SOIC-16 (002-15547)
Packing Size 235
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-DSO-16
Package Name SOIC-16 (002-15547)
Packing Size 235
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
The S79FL512SDSMFBG01 is a 512 Mb (64 MB) flash memory device using Infineon's 65-nm MIRRORBIT™ technology and Eclipse architecture for fast program and erase speeds. It features dual-quad SPI with DDR read up to 80 MHz (160 MBps), a 1024-byte programming buffer, and supports 100,000 program-erase cycles minimum. Operating from 2.7 V to 3.6 V in a 16-pin SOIC package, it offers advanced sector protection, ECC, and AEC-Q100 qualification.

Features

  • SPI interface with Dual-Quad support
  • 104 MHz Quad Read, 80 MHz Quad DDR Read
  • 24- or 32-bit addressing options
  • 3 MBps programming speed
  • Hardware ECC with single bit correction
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles per sector
  • 20 year data retention
  • 2048-byte OTP security region
  • Flexible block and sector protection
  • Hardware Reset input (RESET#)
  • Core supply voltage: 2.7 V to 3.6 V

Benefits

  • High-speed reads enable fast data access
  • Flexible addressing supports large designs
  • Fast programming boosts throughput
  • ECC improves data reliability
  • Hybrid/uniform erase fits varied needs
  • High endurance for long device life
  • Long retention secures critical data
  • OTP region enhances system security
  • Sector/block protection prevents data loss
  • Hardware reset ensures safe recovery
  • Wide supply range eases system design
  • Dual-Quad SPI maximizes interface speed

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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