Please note that this is an end of life product. See newer alternative product version Please note that this is an end of life product. See newer alternative product version
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END OF LIFE
discontinued
RoHS Compliant

S29GL256P90TFIR20

END OF LIFE

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Product details

  • Density
    256 MBit
  • Family
    GL-P
  • Initial Access Time
    90 ns
  • Interface Frequency (SDR/DDR) (MHz)
    NA
  • Interfaces
    Parallel
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    3 V to 3.6 V
  • Operating Voltage
    3 V
  • Page Access Time
    25 ns
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
OPN
S29GL256P90TFIR20
Product Status discontinued
Infineon Package
Package Name TSOP-56 (002-15549)
Packing Size 455
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status discontinued
Infineon Package
Package Name TSOP-56 (002-15549)
Packing Size 455
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S29GL256P90TFIR20 is a 256 Mbit page-mode Flash memory built on 90 nm MirrorBit® technology, offering uniform 128 Kbyte sectors for embedded applications needing high density and performance. Operating at 2.7–3.6 V, it supports VersatileIO™ for I/O voltages from 1.65 V to VCC and delivers a 90 ns random access time. The device features a 32-word write buffer. Industrial temperature range and 56-pin TSOP package ensure suitability for demanding environments.

Features

  • 90 nm MirrorBit process technology
  • Single 3 V read/program/erase operation
  • VersatileIO control (1.65 V to VCC I/O)
  • 32-word/64-byte write buffer
  • 8-word/16-byte page read buffer
  • Uniform 64 Kword/128 Kbyte sectors
  • 128-word/256-byte Secured Silicon Sector
  • Advanced sector protection methods
  • Program/Erase Suspend and Resume
  • Hardware data protection (WP#/ACC, VCC)
  • Write pulse glitch protection
  • 100,000 erase cycles per sector (typical)

Benefits

  • High density for embedded storage needs
  • Low voltage reduces power consumption
  • Flexible I/O for easy system integration
  • Fast programming with write buffer
  • Page read buffer speeds up data access
  • Simplifies memory management
  • Secure area for permanent IDs
  • Protects data from accidental changes
  • Suspend/resume boosts system efficiency
  • Hardware protection prevents data loss
  • Glitch protection ensures data integrity
  • High endurance for long device life

Applications

Documents

Design resources

Developer community

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