Active and preferred
RoHS Compliant
Lead-free

S25HL01GTDPMHM010

Data Sheet
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S25HL01GTDPMHM010
S25HL01GTDPMHM010
Data Sheet

Product details

  • Classification
    ISO 26262-compliant
  • Density
    1 GBit
  • Family
    HL-T
  • Interface Bandwidth
    66 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 66
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature
    -40 °C to 125 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2037
  • Qualification
    Automotive
Recommended
OPN
S25HL01GTDPMHM010
Product Status active and preferred
Infineon Package
PG-DSO-16
Package Name SOIC-16 (002-15547)
Packing Size 2400
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-DSO-16
Package Name SOIC-16 (002-15547)
Packing Size 2400
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25HL01GTDPMHM010 is a 1 Gb SEMPER™ NOR Flash using Infineon's 45-nm MIRRORBIT™ technology, supporting Quad SPI up to 102 MBps (DDR, 102 MHz) and 2.7 V to 3.6 V supply. It features flexible sector architectures, ISO 26262 ASIL B/D safety, Endurance Flex for high endurance, and ECC for data integrity. Advanced sector protection, AutoBoot, and operation from -40°C to +125°C (AEC-Q100 Grade 1) suit automotive, industrial, and embedded systems.

Features

  • 45-nm MIRRORBIT™ stores 2 bits/cell
  • Uniform and hybrid sector architectures
  • 256/512-byte page programming buffer
  • 1024-byte OTP secure silicon array
  • Quad SPI up to 102 MBps (DDR, 102 MHz)
  • Dual SPI up to 41.5 MBps (SDR, 166 MHz)
  • SPI up to 21 MBps (SDR, 166 MHz)
  • Functional safety: ISO26262 ASIL B compliant
  • Endurance Flex: high-endurance/retention
  • Data integrity CRC and built-in ECC (SECDED)
  • SafeBoot for init failure/config corruption
  • Legacy and advanced sector protection

Benefits

  • High density, reliable storage in small
  • Flexible sectoring for varied application
  • Fast programming for efficient data handling
  • Secure OTP for device authentication
  • High-speed Quad/Dual SPI for rapid data
  • Industry-leading functional safety for
  • Partitioning optimizes endurance
  • Robust data integrity with CRC and ECC
  • SafeBoot ensures system recovery and uptime
  • Advanced protection prevents unauthorized
  • Instant boot accelerates system startup
  • Hardware reset enables reliable system

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community", "labelEn" : "Ask the community" }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions", "labelEn" : "View all discussions" } ] }