Active and preferred
RoHS Compliant
Lead-free

S25FS256SAGMFB001

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S25FS256SAGMFB001
S25FS256SAGMFB001

Product details

  • Classification
    ISO 26262-ready
  • Density
    256 MBit
  • Family
    FS-S
  • Interface Bandwidth
    66 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / -
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature range
    -40 °C to 105 °C
  • Operating Voltage range
    1.7 V to 2 V
  • Operating Voltage
    1.8 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Automotive
OPN
S25FS256SAGMFB001
Product Status active and preferred
Infineon Package
Package Name SOIC-16 (002-15547)
Packing Size 705
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name SOIC-16 (002-15547)
Packing Size 705
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25FS256SAGMFB001 is a 256 Mbit (32 MB) automotive-grade, AEC-Q100 qualified serial NOR Flash memory using 65-nm MIRRORBIT™ technology and Eclipse architecture. It supports SPI Multi-I/O with single, dual, and quad data lines, operates at 1.7 V to 2.0 V, and achieves up to 80 MBps read speed in Quad DDR mode. Features include hybrid and uniform sector options, 100,000 program-erase cycles, and advanced sector protection for reliable code storage in harsh environments.

Features

  • SPI interface with multi I/O support
  • DDR and QPI read modes
  • 256- or 512-byte page programming buffer
  • Internal ECC with single-bit error correction
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles minimum
  • 20 year data retention minimum
  • 1.7 V to 2.0 V supply voltage
  • Operating temperature up to +125°C
  • Serial flash discoverable parameters (SFDP)
  • Advanced sector and block protection
  • 65-nm MIRRORBIT™ technology

Benefits

  • Flexible interface for various host systems
  • Fast data access with DDR and QPI modes
  • Efficient large or small page programming
  • Reliable data with built-in ECC
  • Versatile erase for different applications
  • High endurance for frequent updates
  • Long-term data storage reliability
  • Low voltage for energy-efficient designs
  • Robust operation in harsh environments
  • Easy configuration and compatibility
  • Enhanced security for sensitive data
  • Advanced process for high density/low cost

Applications

Documents

Design resources

Developer community

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