Active and preferred
RoHS Compliant
Lead-free

S25FL128SDPNFI003

Data Sheet
package
software

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

S25FL128SDPNFI003
S25FL128SDPNFI003
Data Sheet

Product details

  • Density
    128 MBit
  • Family
    FL-S
  • Interface Bandwidth
    66 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 66
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature
    -40 °C to 85 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Industrial
Recommended
OPN
S25FL128SDPNFI003
Product Status active and preferred
Infineon Package
PG-WSON-8
Package Name DFN-8 (002-18827)
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-WSON-8
Package Name DFN-8 (002-18827)
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25FL128SDPNFI003 is a 128 Mb (16 MB) SPI NOR flash memory using 65-nm MIRRORBIT™ technology and Eclipse architecture, supporting DDR operation up to 80 MHz and Quad I/O read rates up to 80 MBps. It operates with a 3.0 V core, I/O voltage from 1.65 V to 3.6 V, and offers 100,000 program-erase cycles, 20-year data retention, advanced sector protection, and AEC-Q100 automotive qualification for reliable code storage and data logging in demanding embedded applications.

Features

  • CMOS 3.0 V core with versatile I/O
  • SPI interface with multi-I/O support
  • DDR and SDR clocking options
  • Extended addressing: 24- or 32-bit
  • Multiple read modes: Normal, Fast, Dual
  • Page programming up to 1.5 MBps
  • Automatic ECC with single-bit correction
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles min
  • 20-year data retention min
  • 1024-byte OTP security region
  • Advanced sector and block protection

Benefits

  • Flexible I/O simplifies system integration
  • High-speed SPI boosts data throughput
  • DDR/SDR options enable design flexibility
  • Extended addressing supports large memory
  • Multiple read modes optimize performance
  • Fast programming accelerates production
  • ECC improves data reliability
  • Sector options ease legacy migration
  • High endurance lowers maintenance cost
  • Long retention ensures data safety
  • OTP region enables secure device ID
  • Robust protection enhances data security

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community", "labelEn" : "Ask the community" }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions", "labelEn" : "View all discussions" } ] }