Active and preferred
RoHS Compliant
Lead-free

CYT2B77CADQ0AZEGST

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CYT2B77CADQ0AZEGST
CYT2B77CADQ0AZEGST

Product details

  • 16bit TCPWM (Motor control)
    12
  • 16bit TCPWM
    63
  • 32bit TCPWM
    4
  • ADC Channel
    54
  • ASIL/SIL support
    ASIL-B
  • CAN-FD
    6
  • Classification
    ISO 26262-compliant
  • CXPI
    0
  • Cybersecurity Classification
    ISO 21434-ready
  • Debug Interface
    SWD/JTAG/Trace
  • DMA Channels
    89/33/4
  • eMMC
    0
  • eSHE/HSM
    HSM
  • Ethernet Ports
    0
  • Ethernet speed
    NA
  • External Interrupt channel
    122
  • Flash Security
    Yes
  • Flash
    1088 kByte
  • FlexRayTM
    0
  • Floating Point Unit
    Single precision
  • GPIO
    122
  • I2S
    NA
  • LIN
    8
  • Main Core frequency
    160 MHz
  • Main Core type/Crypto Core type
    ARM_CM4F/CM0+
  • MPU
    Yes
  • Operating temperature range TA
    -40°C to 125°C
  • PPU
    Yes
  • RC-OSC
    Yes
  • RTC channel
    1
  • SCB Blocks
    8
  • Smart IOs
    29
  • SMIF (SPI/HyperBus)
    NA
  • SRAM
    128 kByte
  • Supply Voltage
    2.7 to 5.5
  • Temperature sensor
    Yes
  • Watchdog
    Yes
  • Work Flash
    96 kByte
OPN
CYT2B77CADQ0AZEGST
Product Status active and preferred
Infineon Package
Package Name LQFP-144 (002-13015)
Packing Size 300
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name LQFP-144 (002-13015)
Packing Size 300
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The CYT2B77CADQ0AZEGST is a TRAVEO T2G automotive microcontroller with a 160 MHz ARM Cortex-M4F core (FPU) and Cortex-M0+ for security and peripherals. It offers 1088 KB flash, 128 KB SRAM, 96 KB work flash, 54 ADC channels, 6 CAN FD, 8 LIN, 8 SCB, 63 16-bit and 4 32-bit timers, and 122 GPIOs. Operating from 2.7 V to 5.5 V and -40°C to 125°C, it meets ASIL-B, ISO 26262, and ISO 21434-ready cybersecurity with HSM. Debug via SWD/JTAG/Trace.

Features

  • Dual Arm Cortex-M4F (160 MHz) and Cortex-M0+
  • Single-precision FPU on Cortex-M4F
  • Three DMA controllers
  • 1088 KB code-flash, 96 KB work-flash, 128 KB
  • Read-While-Write flash, dual-bank for OTA
  • Crypto engine: AES, 3DES, SHA, RSA, ECC,
  • Functional safety: MPU, PPU, SMPU, WDT,
  • CAN FD up to 8 Mbps, ISO 11898-1:2015
  • 12-bit, 1 Msps SAR ADC, up to 64 external
  • Up to 8 SCB channels: I2C, SPI, UART
  • Up to 8 LIN channels, ISO 17987 compliant
  • Multiple low-power modes: Sleep, Deep Sleep,

Benefits

  • Dual CPUs enable parallel processing
  • FPU accelerates math-intensive tasks
  • DMA boosts data throughput, lowers CPU load
  • Large flash/SRAM supports complex
  • OTA update with RWW flash reduces downtime
  • Crypto engine secures data and communication
  • Safety features enhance system reliability
  • CAN FD enables fast, robust networking
  • High-speed ADC improves sensor accuracy
  • Flexible I2C/SPI/UART for diverse interfaces
  • LIN support simplifies automotive integration
  • Low-power modes extend battery/system life

Applications

Documents

Design resources

Developer community

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