CY7C1312KV18-300BZXIT

Data Sheet

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CY7C1312KV18-300BZXIT
CY7C1312KV18-300BZXIT
Data Sheet

Product details

  • Architecture
    QDR-II
  • Bank Switching
    N
  • Burst Length (Words)
    2
  • Data Width
    x 18
  • Density
    18 MBit
  • ECC
    N
  • Family
    QDR-II
  • Frequency
    300 MHz
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Sn/Ag/Cu
  • On-Die Termination
    N
  • Operating Temperature
    -40 °C to 85 °C
  • Operating Voltage (VCCQ)
    1.7 V to 1.9 V
  • Operating Voltage
    1.7 V to 1.9 V
  • Organization (X x Y)
    1Mb x 18
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
  • Read Latency (Cycles)
    1.5
  • Real Time Clock
    N
  • RTC Alarm
    N
  • Watchdog
    N
OPN
Product Status
Infineon Package
Package Name
Packing Size
Packing Type
Moisture Level
Moisture Packing
Lead-free
Halogen Free
RoHS Compliant
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