CY62148EV30LL-45ZSXIT
Active and preferred
RoHS Compliant
Lead-free

CY62148EV30LL-45ZSXIT

Datasheet
package
ea.
in stock

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CY62148EV30LL-45ZSXIT
CY62148EV30LL-45ZSXIT
ea.
Datasheet


Product details

  • Density
    4 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) max
    3.6 V
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    512K x 8
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
  • Speed
    45 ns

Recommended
OPN
CY62148EV30LL-45ZSXIT
Product Status active and preferred
Infineon Package
PG-TSOP-32
Package Name TSOP-II-32 (51-85095)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Country of Assembly (CoA)
CN
Country of Diffusion (CoD)
US
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TSOP-32
Package Name TSOP-II-32 (51-85095)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
Country of Assembly (CoA)
CN
Country of Diffusion (CoD)
US
ea.
in stock
CY62148EV30LL-45ZSXIT is a 4-Mbit (512K × 8) CMOS asynchronous SRAM optimized for low power in 3 V systems. It operates from 2.2 V to 3.6 V over −40°C to +85°C and delivers 45 ns access. Typical active current is 3.5 mA at 1 MHz, with standby down to 2.5 µA (7 µA max) using automatic power-down when CE is HIGH. It uses standard CE/OE/WE controls and is a Pb-free 32-pin TSOP II with tape-and-reel option.

Features

  • 4-Mbit SRAM (512K × 8)
  • 2.2 V to 3.6 V supply
  • 45 ns read cycle time (tRC)
  • 22 ns OE LOW to data valid
  • Auto power-down when CE HIGH
  • Standby current 2.5 µA typ
  • Standby current 7 µA max
  • Active current 3.5 mA at 1 MHz
  • Data retention at VCC = 1.5 V
  • Data retention current 8.8 µA max
  • I/O high-Z when CE/OE HIGH
  • 10 pF max input/output capacitance

Benefits

  • Fast reads reduce CPU wait states
  • Wide VCC fits 3.3 V designs
  • Auto power-down cuts idle power
  • µA standby extends battery life
  • Low active current saves energy
  • 1.5 V retention preserves data
  • High-Z outputs ease bus sharing
  • Low I/O caps support fast edges
  • Quick OE access boosts throughput
  • Simple CE/OE control expands memory
  • Lower heat from low supply current
  • Predictable timings simplify design

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