PSoC® 4000

Overview

The PSoC 4000 family is a cost-optimized, entry level family of microcontrollers. It delivers the industry’s best capacitive sensing technology, CapSense, to implement buttons and sliders.

32-Bit MCU Subsystem:

  • 16-MHz Arm® Cortex®-M0 CPU 
  • 16KB Flash with Read Accelerator
  • 2KB SRAM

Programmable Analog Blocks :

  • One 10-bit, 46.8-ksps single-slope analog-to-digital converter (ADC)
  • One low-power comparator (CMP) 
  • Two 7-bit current-output digital-to-analog converters (IDAC) configurable as a single 8-bit IDAC, for general-purpose or capacitive sensing

Low Power 1.71V to 5.5V Operation:

  • Deep Sleep mode with wake-up on interrupt and I2C address detect

Capacitive Sensing:

  • Cypress Capacitive Sigma-Delta (CSD) provides best-in-class signal-to-noise ratio (SNR) and water tolerance

Serial Communication:

  • Multi-master I2C block with the ability to do address matching during Deep Sleep and generate a wake-up on match

Timing and Pulse-Width Modulation:

  • One 16-bit timer/counter/pulse-width modulation (TCPWM) block
  • Center-aligned, Edge, and Pseudo-Random modes
  • Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications

Up to 20 GPIO pins:

  • 24-pin QFN and 16-pin SOIC packages

Temperature Ranges:

  • Automotive Electronics Council (AEC) AEC-Q100 Qualified
  • A Grade: -40°C to +85°C
  • S Grade: -40°C to +105°C
  • E Grade: -40°C to +125°C

Development Tools:

  • PSoC Creator design environment providing an Integrated Development Environment (IDE) including schematic design entry and build (with analog and digital routing)
  • Industry-standard tool compatibility; after schematic entry, development can be done with Arm-based industry-standard development tools

PSoC® 4000 Block Diagram

Highlights
Details

Access to complete AURIX™, Traveo™ and PsoC® technical documentation including data sheets, app notes, etc.:

 

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