SAK-TC487QQ-16NF400MC AA
NEW
Active and preferred
RoHS Compliant
Lead-free

SAK-TC487QQ-16NF400MC AA

NEW
AURIX™ TC4x—power, safety, security and connectivity in one MCU
Data Sheet
package

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SAK-TC487QQ-16NF400MC AA
SAK-TC487QQ-16NF400MC AA
Data Sheet

Product details

  • # of cores / lockstep cores
    4/4
  • ASIL/SIL support
    ASIL-D
  • CAN Nodes
    20
  • Classification
    ISO26262-compliant
  • DSP Functionality
    Yes
  • eMMC
    No
  • External Bus Interface
    Yes
  • Family
    AURIX™ TC4
  • Floating Point Unit
    Yes
  • Hardware Accelerator
    Yes
  • LIN Controller
    Up to 20 via ASCLIN
  • On-chip Clock Generation
    Yes
  • On-chip Voltage Regulator
    Yes
  • Operating Temperature range
    -40 °C to 125 °C
  • Oscillator Watchdog
    Yes
  • Program Memory
    16 MByte
  • Real Time Clock
    Yes
  • SPI
    8
  • SRAM (incl. Cache) (Without cache)
    3 Bit
  • Type of Memory
    RRAM
Recommended
OPN
TC487QQ16NF400MCAAKXUMA1
Product Status active and preferred
Infineon Package
PG-LFBGA-292
Package Name N/A
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-LFBGA-292
Package Name -
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
SAK‑TC487QQ‑16NF400MC is part of the AURIX™ TC4x family, purpose‑built for mainstream zone/domain controllers, mainstream gateways, and high‑performance camera monitoring. It combines 4/4 lockstep TriCore processing up to 400 MHz with ASIL‑D–capable safety for dependable real‑time control. A decentralized security architecture with CSRM and Crypto Satellites (CSS) safeguards software and communications, while the Data Routing Engine (DRE) and integrated 2.5‑GbE plus 10/100‑Mb Ethernet move data efficiently with minimal CPU load—helping you consolidate more functions on a single ECU and process faster.

Features

  • 4/4 lockstep TriCore CPUs
  • 16 MB program RRAM
  • 3 MB on‑chip SRAM
  • 400 MHz core frequency
  • 20 CAN-FD, 8x QSPI, 20x ASCLIN
  • Up to 61 analog input pins
  • ASIL‑D capable safety architecture
  • 3× 10/100 Mb LETH modules 1x 2.5Gb Ethernet
  • Data Routing Engine (DRE) with Ethernet bridging
  • FlexRay networking: 1 module / 2 channels
  • External memory support via xSPI (NOR) and on‑chip QSPI
  • PG‑LFBGA‑292 Package

Benefits

  • Large local memories for fast data access
  • Faster bring‑up with integrated debug
  • High-performance CSRM security module
  • CSS crypto offload
  • Software backwards compatible with AURIX™ TC3x MCUs
  • Strong software ecosystem (MC‑ISAR, Drive Core)

Applications

Documents

Design resources

Partner solutions

Developer community

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