CY7C1041G30-10ZSXI
Active and preferred
RoHS Compliant
Lead-free

CY7C1041G30-10ZSXI

High-Performance 4 Mbit FAST SRAM with Parallel Interface and Industrial Qualification
Datasheet
package
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CY7C1041G30-10ZSXI
CY7C1041G30-10ZSXI
ea.
Datasheet

Product details

  • Density
    4 MBit
  • Family
    FAST SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Ni/Pd/Au
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) range
    2.2 V to 3.6 V
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    256K x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
  • Speed
    10 ns
Recommended
OPN
CY7C1041G30-10ZSXI
Product Status active and preferred
Infineon Package
PG-TSOP-44
Package Name TSOP-II-44 (51-85087)
Packing Size 1350
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TSOP-44
Package Name TSOP-II-44 (51-85087)
Packing Size 1350
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY7C1041G30-10ZSXI is a 4-Mbit (256K × 16) asynchronous CMOS SRAM with embedded ECC for single-bit error correction. It operates from 2.2 V to 3.6 V over -40°C to 85°C and supports 10 ns access time. At max VCC, operating ICC is 45 mA max (38 mA typ at 100 MHz), and automatic CE power-down reduces standby current (ISB2 8 mA max). It supports BLE/BHE byte access and OE/WE/CE control.

Features

  • 4-Mbit SRAM (256K × 16)
  • Embedded ECC single-bit correct
  • ERR pin flags corrected read errors
  • Address access time tAA 10 ns/15 ns
  • Read cycle time tRC 10 ns/15 ns
  • OE to data valid tDOE 4.5 ns max
  • Byte write/read via BHE and BLE
  • Automatic CE power-down mode
  • Data retention down to 1.0 V
  • Industrial temp -40°C to +85°C
  • TTL-compatible inputs and outputs

Benefits

  • ECC improves data integrity in SRAM
  • ERR pin enables fault monitoring
  • 10 ns access supports fast CPU buses
  • Fast tDOE reduces read latency
  • Byte enables cut bandwidth and power
  • CE power-down lowers idle current
  • 1.0 V retention keeps backup data
  • Wide temp range boosts reliability
  • TTL I/O simplifies logic interfacing
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