CY62168EV30LL-45BVXIT
Active and preferred
RoHS Compliant
Lead-free

CY62168EV30LL-45BVXIT

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CY62168EV30LL-45BVXIT
CY62168EV30LL-45BVXIT

Product details

  • Density
    16 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    2M x 8
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
OPN
CY62168EV30LL-45BVXIT
Product Status active and preferred
Infineon Package
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY62168EV30LL-45BVXIT is a 16-Mbit (2M × 8) CMOS static RAM for portable, battery-powered systems. It operates from 2.2 V to 3.6 V over -40°C to 85°C and supports 45 ns access. Low-power operation includes 7 mA typical active current at 1 MHz and 1.5 µA typical standby (12 µA max) with automatic power-down when deselected and high-impedance I/Os. It is offered in a Pb-free 48-ball VFBGA (BV) package.

Features

  • 16-Mbit SRAM, 2M × 8
  • 45 ns read/write cycle time
  • Address to data valid 45 ns
  • OE to data valid 22 ns
  • Single supply 2.2 V to 3.6 V
  • Active current 7 mA at 1 MHz typ
  • Standby 1.5 µA typ, 12 µA max
  • Data retention at VCC down to 1.5 V
  • Retention current 10 µA max
  • CE1/CE2 chip enables, OE, WE
  • Tri-state I/O on deselect or OE
  • Input/output capacitance 10 pF max

Benefits

  • Stores 2 MB for code or buffers
  • 45 ns cuts memory access latency
  • 45 ns tAA supports fast CPUs
  • 22 ns OE speeds random reads
  • 2.2–3.6 V fits common 3 V rails
  • 7 mA at 1 MHz lowers energy use
  • µA standby extends battery life
  • 1.5 V retention keeps data on droop
  • 10 µA retention eases backup power
  • CE/OE/WE simplifies bus control
  • Tri-state enables bus sharing
  • Low capacitance eases SI margins

Applications

Documents

Design resources

Developer community