CY62167EV18LL-55BVXIT
Active and preferred
RoHS Compliant
Lead-free

CY62167EV18LL-55BVXIT

Datasheet
package

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CY62167EV18LL-55BVXIT
CY62167EV18LL-55BVXIT
Datasheet


Product details

  • Density
    16 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    1.65 V to 2.25 V
  • Organization (X x Y)
    1M x 16
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial

Recommended
OPN
CY62167EV18LL-55BVXIT
Product Status active and preferred
Infineon Package
PG-VFBGA-48
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-VFBGA-48
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY62167EV18LL-55BVXIT is a 16-Mbit (1 M × 16) CMOS asynchronous SRAM in a Pb-free 48-ball VFBGA (6 × 8 × 1 mm). It operates from 1.65 V to 2.25 V over -40°C to +85°C and supports a 55 ns speed grade. Automatic power-down when deselected reduces standby to 1.5 µA typical (12 µA max). Active current is 2.2 mA typical at 1 MHz, and byte enables (BHE/BLE) allow upper or lower byte access.

Features

  • 1 M × 16 CMOS SRAM array
  • 55 ns read/write cycle time
  • 1.65 V to 2.25 V VCC operation
  • 1.5 µA typ standby current
  • 12 µA max standby current
  • 2.2 mA typ ICC at 1 MHz
  • 30 mA max ICC at fmax
  • OE/CE tri-state outputs (High-Z)
  • Byte write via BHE/BLE signals
  • 10 pF max CIN/COUT
  • ESD >2001 V (MIL-STD-883)
  • -40°C to +85°C ambient range

Benefits

  • Fits 16-bit buses, fewer chips
  • 55 ns supports fast SRAM access
  • Low VCC suits low-voltage SoCs
  • µA standby extends battery life
  • Low max standby improves sleep power
  • Low active mA cuts runtime power
  • 30 mA max bounds supply sizing
  • High-Z outputs simplify bus sharing
  • Byte writes reduce write bandwidth
  • Low capacitance eases signal timing
  • ESD robustness improves handling yield
  • Wide temp range improves reliability
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