Gallium Nitride (GaN) transistors — whether grown on Silicon (GaN-on-Silicon) or Silicon Carbide (GaN-on-Silicon Carbide) — both leverage the high-efficiency advantages of wide-bandgap technology, but they differ significantly in cost, thermal performance, and ideal application focus.

GaN-on-Silicon — generally lower in cost and suitable for 10 kHz to 10 MHz applications in consumer electronics (fast chargers), data centers, robots and robotics, and automotive powertrains.

While GaN-on-SiC provides superior thermal management and high power density, making it the preferred choice for communication infrastructure that typically operates in the GHz switching realm.

GaN-on-Silicon & GaN-on-Silicon Carbide comparison

GaN-on-Silicon & GaN-on-Silicon Carbide comparison

Despite their different substrates, both semiconductor materials share several core strengths. Both deliver high efficiency and speed, offering dramatically faster switching speeds (in the MHz range) and lower conduction losses (lower RDS(on)) than traditional silicon (Si) MOSFETs and IGBTs, which results in higher efficiency.

As wide-bandgap semiconductors, both use GaN for its high electron mobility and high breakdown field strength — roughly 10x that of traditional silicon — which allows for smaller, thinner GaN devices that can handle higher voltages.

Both also reduce parasitics by eliminating the parasitic body diode found in Si MOSFETs, which in turn eliminates reverse recovery losses. Finally, both offer greater thermal tolerance than conventional silicon, managing high temperatures better.

The core differences in the SiC vs GaN-on-Si decision span thermal performance, cost, integration, and crystal quality, as the table below shows.

While both configurations share the same top-level active regions to form a Two-Dimensional Electron Gas (2DEG) channel, their underlying structural support paths differ drastically to accommodate lattice and thermal expansion mismatches — which is where the GaN epitaxy diverges most.

The active region is identical for both: a thin Aluminum Gallium Nitride (AlGaN) layer is grown on top of a pure GaN channel layer. Because of spontaneous and piezoelectric polarization at this heterojunction, a high-density, high-mobility 2DEG channel forms naturally, without intentional doping.

The GaN-on-Silicon layer stack has to contend with silicon's massive lattice mismatch (~17%) and thermal expansion coefficient (TEC) mismatch (~56%) with GaN. To prevent the wafer from warping or cracking during cooling, manufacturers must grow highly complex, thick transition layers — such as stepped AlGaN layers or AlN/GaN superlattices — on top of the silicon substrate. This pushes the total epitaxial thickness to 5 µm–7 µm.

The GaN-on-SiC layer stack benefits from a much tighter lattice mismatch (~3%) and a closer TEC match with GaN. As a result, the transition region is structurally simple, often requiring just a thin Aluminum Nitride (AlN) nucleation layer. The defect (dislocation) density in the active GaN layer is significantly lower than in GaN-on-Silicon.

At Infineon, GaN-on-Silicon is used for both its RF and power products. While both product lines leverage GaN-on-Silicon technology, Infineon's RF GaN-on-Silicon and CoolGaN™ families are engineered for completely different physics paradigms.

The primary difference lies in their operating goals: RF GaN-on-Silicon acts as a high-frequency linear amplifier for processing complex wireless signals, whereas CoolGaN™ acts as an ultra-fast, binary on/off switch for raw electrical power conversion.

The two product families are tuned for different physics, as the table below summarizes:

Three optimization vectors set the two product families apart.

In RF GaN-on-Silicon, native GaN materials naturally form a conductive 2DEG channel, producing a depletion-mode (normally-on) device. This is preferred in RF design because leaving the channel unconstricted yields maximum electron mobility and maximum power gain at gigahertz speeds. CoolGaN™, by contrast, must be enhancement-mode (normally-off) so that it cuts power if the control circuitry fails — essential for power grids and electronics safety.

To achieve this, Infineon adds a specialized p-type GaN gate structure that modifies the energy bands to interrupt the 2DEG channel until a positive voltage is applied.

RF GaN-on-Silicon devices use advanced field-plate structures designed strictly to minimize feedback capacitance; lowering this capacitance prevents phase distortion and enables wide operating bandwidths, creating a stable, "Doherty-friendly" device for 5G waveforms.

CoolGaN™ devices are instead optimized for the lowest possible on-resistance (RDS(on)) per unit area to limit heat generation, and they are tailored for ultra-low output charge (Qₒₛₛ) to minimize energy loss when the transistor flips between on and off states.

RF GaN-on-Silicon is used in Doherty power amplifiers and envelope-tracking line-ups, where managing signal linearity, carrier-to-interference ratios, and Error Vector Magnitude (EVM) is crucial.

CoolGaN™ is deployed in resonant hard/soft-switching topologies such as Interleaved Totem-Pole PFC (Power Factor Correction) and LLC converters, where the absence of a body diode eliminates reverse recovery charge (Qᵣᵣ) losses entirely.

In RF GaN-on-Silicon, native GaN materials naturally form a conductive 2DEG channel, producing a depletion-mode (normally-on) device. This is preferred in RF design because leaving the channel unconstricted yields maximum electron mobility and maximum power gain at gigahertz speeds. CoolGaN™, by contrast, must be enhancement-mode (normally-off) so that it cuts power if the control circuitry fails — essential for power grids and electronics safety.

To achieve this, Infineon adds a specialized p-type GaN gate structure that modifies the energy bands to interrupt the 2DEG channel until a positive voltage is applied.

RF GaN-on-Silicon devices use advanced field-plate structures designed strictly to minimize feedback capacitance; lowering this capacitance prevents phase distortion and enables wide operating bandwidths, creating a stable, "Doherty-friendly" device for 5G waveforms.

CoolGaN™ devices are instead optimized for the lowest possible on-resistance (RDS(on)) per unit area to limit heat generation, and they are tailored for ultra-low output charge (Qₒₛₛ) to minimize energy loss when the transistor flips between on and off states.

RF GaN-on-Silicon is used in Doherty power amplifiers and envelope-tracking line-ups, where managing signal linearity, carrier-to-interference ratios, and Error Vector Magnitude (EVM) is crucial.

CoolGaN™ is deployed in resonant hard/soft-switching topologies such as Interleaved Totem-Pole PFC (Power Factor Correction) and LLC converters, where the absence of a body diode eliminates reverse recovery charge (Qᵣᵣ) losses entirely.

Discover the power of CoolGaN™ in action: our video showcases its real-world benefits, from increased efficiency to reduced size and weight to lower overall system costs.

See more insights about GaN from a global leader in power semiconductors

What exactly are GaN-on-Silicon and GaN-on-SiC transistor technologies?

Both are wide-bandgap (WBG) semiconductor stacks that use a layer of Gallium Nitride (GaN) as the active semiconductor material for high-performance electron mobility. They differ in the base substrate wafer used to grow the GaN film — Silicon (Si) or Silicon Carbide (SiC).

Infineon offers GaN-on-Silicon. It uses GaN-on-Silicon technology for both the RF and power markets primarily to achieve massive cost scaling, volume manufacturability, and high electrical performance. Leveraging the mature silicon supply chain allows Infineon to produce advanced wide-bandgap devices at commercially viable price points. Both markets benefit from the fundamental properties of GaN materials — high electron mobility, high breakdown voltage, and high critical electric field.

In the RF market, the advantages include cost-effective 5G/6G scaling, enabling highly integrated RF Power Amplifiers (RF PAs) at frequencies greater than 6 GHz at a commercially viable price point, along with the efficiency and size benefits of the high power density required for wireless infrastructure while fitting into the strict size restrictions of active antenna systems (AAS). In the power conversion market, the advantages include higher efficiency and miniaturization — faster switching speeds radically reduce energy lost as heat and enable major size and weight reductions in power supplies, solar inverters, and automotive systems — plus advanced packaging, since GaN-on-Silicon, coupled with Infineon's advanced packaging concepts, minimizes parasitic elements for ultra-fast and reliable switching.

For more on where and why GaN is the right fit across these RF and power markets, see Infineon's Where, why GaN overview.

Across RF applications, GaN-on-Silicon supports several areas. In 5G infrastructure, the rollout of 5G networks demands efficient power amplifiers capable of operating in mmWave frequency bands, and GaN-on-Silicon enables high-power RF transmitters for base stations, providing improved efficiency and reduced system costs compared with alternative solutions.

In aerospace and radar systems — where defense and aerospace applications require RF components capable of delivering high power at frequencies ranging from a few gigahertz to microwave frequencies — GaN-on-Silicon amplifiers are being used to enhance signal range and reliability while minimizing power consumption. In satellite communication, where systems rely on high-power RF transmitters to maintain reliable signal transmission across vast distances, GaN-on-Silicon offers compact, high-performance solutions that improve efficiency and signal integrity.

And in wireless power transmission, GaN-on-Silicon is also playing a role, since high-frequency operation is essential for efficient energy transfer.

In power electronics, GaN-on-Silicon spans consumer electronics, with high-efficiency, ultra-compact chargers for smartphones, tablets, and laptops; automotive, including low-power auxiliary systems, wireless EV charging, and highly efficient on-board chargers (OBCs) for electric vehicles; data centers, with high-density power supplies and server racks that minimize energy loss and cooling requirements; and industrial and motor drives, including high-precision motor controllers for robotics, drones, and e-bikes that deliver smoother performance and quieter operation.

Because Infineon's RF GaN PAMs and MMICs are proprietary ASICs (Application-Specific Integrated Circuits), access to their technical data sheets or evaluation modules requires establishing a direct corporate NDA with Infineon. Hardware developers planning a base station architecture are encouraged to get in touch.

GaN-on-SiC is a wide-bandgap semiconductor stack in which a Gallium Nitride (GaN) film is grown on a Silicon Carbide (SiC) substrate, forming a high-density, high-mobility Two-Dimensional Electron Gas (2DEG) channel.

Compared with GaN-on-Silicon, the SiC substrate offers much better thermal conductivity (~370–490 W/m·K for superior heat spreading) and a lower lattice mismatch (~3%) with GaN, which yields better crystal quality and a structurally simpler transition region — often just a thin Aluminum Nitride (AlN) nucleation layer.

These properties make GaN-on-SiC the preferred choice for high-power, high-frequency applications such as macro base stations, radar, defense, high-power EV traction inverters, and industrial converters, typically in the GHz switching realm. The trade-off is a higher substrate cost and smaller wafers (typically 100–150 mm).

GaN-on-Si is a wide-bandgap semiconductor stack in which a Gallium Nitride (GaN) film is grown on a standard silicon (Si) substrate, forming the same high-density, high-mobility Two-Dimensional Electron Gas (2DEG) channel used across GaN devices. Its defining advantage is cost and scale: it leverages mature 200–300 mm silicon fabs and supply chains, allows easier monolithic integration with CMOS and 3D stacking, and benefits from the broad silicon ecosystem.

The trade-offs are a lower substrate thermal conductivity (~150 W/m·K) and a much larger lattice mismatch (~17%) and thermal expansion mismatch (~56%) with GaN, which require thick, complex transition layers. GaN-on-Si is generally suited to 10 kHz to 10 MHz applications and is used in consumer chargers, EV onboard chargers, data centers, small cells, and mid-band Massive MIMO.

At Infineon, GaN-on-Si underpins both the RF and CoolGaN™ power product lines.

Neither is universally "better" — the two are optimized for different goals, so the right choice depends on the application. GaN-on-Si wins on cost, wafer size, manufacturability, and integration, leveraging mature 200–300 mm silicon fabs and easier monolithic integration with CMOS. GaN-on-SiC wins on thermal management (~370–490 W/m·K vs. ~150 W/m·K), crystal quality (~3% vs. ~17% lattice mismatch), and high-power density.

That maps directly to typical sockets: GaN-on-Si suits small cells, mid-band Massive MIMO, consumer chargers, and EV onboard chargers, while GaN-on-SiC suits macro base stations, radar, defense, high-power EV traction inverters, and industrial converters.

The decision comes down to matching cost, frequency, voltage, and thermal needs to the target application rather than declaring one substrate superior.

The GaN-on-Silicon process grows a GaN film on a silicon substrate, which is challenging because silicon has a massive lattice mismatch (~17%) and a thermal expansion coefficient (TEC) mismatch (~56%) with GaN. To stop the wafer from warping or cracking during cooling, manufacturers grow highly complex, thick transition layers — such as stepped AlGaN layers or AlN/GaN superlattices — on top of the silicon substrate, pushing the total epitaxial thickness to roughly 5 µm–7 µm.

On top of this, the active region is formed by growing a thin Aluminum Gallium Nitride (AlGaN) layer over a pure GaN channel layer; spontaneous and piezoelectric polarization at this heterojunction creates the high-density, high-mobility 2DEG channel naturally, without intentional doping.

The pay-off of this process is that it leverages mature, large-diameter silicon fabs and supply chains for cost-effective, high-volume manufacturing.