CY62157G30-45ZSXA
Active and preferred
RoHS Compliant
Lead-free

CY62157G30-45ZSXA

Datasheet
package

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CY62157G30-45ZSXA
CY62157G30-45ZSXA
Datasheet


Product details

  • Alarms
    N
  • Density
    8 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Ni/Pd/Au
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) range
    2.2 V to 3.6 V
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    512Kb x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Automotive(A)
  • Real Time Clock
    N
  • Speed
    45 ns
  • Watchdog Timer
    N

Recommended
OPN
CY62157G30-45ZSXA
Product Status active and preferred
Infineon Package
PG-TSOP-44
Package Name TSOP-II-44 (51-85087)
Packing Size 1350
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TSOP-44
Package Name TSOP-II-44 (51-85087)
Packing Size 1350
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY62157G30-45ZSXA is an 8-Mbit (512K × 16) automotive SRAM with embedded ECC for single-bit error correction. It supports 45 ns asynchronous access with TTL-compatible I/O and byte write enables (BHE, BLE). The device operates from 2.2 V to 3.6 V across -40°C to 85°C (AEC-Q100 Automotive-A). Automatic power-down standby current is 1.4 µA typical and 6.5 µA max. ZS is a Pb-free 44-pin TSOP II package.

Features

  • 8-Mbit SRAM (512K x 16)
  • ECC corrects single-bit errors
  • 45 ns/55 ns read/write cycles
  • VCC 1.65-2.2 V or 2.2-3.6 V
  • 5 µA typical standby current
  • 35 µA max standby current
  • 16-bit I/O bus (I/O0 to I/O15)
  • Byte write with BHE/BLE enables
  • Dual chip-enable inputs CE1/CE2
  • I/O Hi-Z on deselect or OE high
  • Input/output leakage ±1 µA
  • 1.5-V data retention support

Benefits

  • ECC helps prevent data corruption
  • 45 ns enables fast CPU reads
  • Two VCC ranges ease rail reuse
  • 5 µA standby extends battery life
  • 35 µA max simplifies power budget
  • 16-bit bus increases data bandwidth
  • Byte writes reduce bus transactions
  • Dual CE supports easy bus sharing
  • Hi-Z outputs avoid bus contention
  • ±1 µA leakage lowers static loss
  • Data retention keeps state at 1.5 V
  • Standard OE/WE controls simplify HW
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