PSoC® 4100M/4200M

Overview

The PSoC 4100M family adds intelligent analog integration through programmable analog blocks. Programmable analog blocks include analog-to-digital converters (ADCs), digital-to-analog converters (DACs), low-power comparators, and operational amplifiers (opamps).

The PSoC 4200M family boosts the flexibility and performance of the PSoC 4 portfolio by adding programmable, Universal Digital Blocks (UDBs). UDBs can be configured to set-up custom digital interfaces, state machines, and custom logic functions.

Key features: 

32-bit MCU Subsystem: 

  • 48MHz Arm® Cortex®-M0 CPU
  • Up to 128KB Flash with Read Accelerator
  • Up to 16KB SRAM 
  • 8-channel DMA engine

Programmable Analog:

  • One 12-bit 1-Msps SAR ADC with differential and single-ended modes, and Channel Sequencer
  • Four opamps configurable as programmable gain amplifiers (PGAs), trans-impedance amplifiers, voltage buffers, filters, comparators, etc. 
  • Two low-power comparators (CMPs) that operate in Deep Sleep low-power mode
  • Four 7-bit current-output digital-to-analog converters (IDAC), where two can be configured as a single 8-bit IDAC, for general-purpose or capacitive sensing

Programmable Digital:

  • Four programmable logic blocks, each with 8 Macrocells and an 8-bit data path (called universal digital blocks or UDBs)

Low Power 1.71 to 5.5 V Operation 

  • 20-nA Stop Mode with GPIO pin wakeup
  • Hibernate and Deep Sleep modes allow wakeup-time versus power trade-offs

Capacitive Sensing:

  • Cypress Capacitive Sigma-Delta (CSD) provides best-in-class signal-to-noise ratio (SNR) and water tolerance

LCD Drive Capability: 

  • LCD segment drive capability on GPIOs

Serial Communication: 

  • Four independent run-time reconfigurable Serial Communication Blocks (SCBs) with re-configurable I2C, SPI, UART, or LIN Slave functionality
  • Two independent CAN 2.0B blocks

Timing and Pulse-Width Modulation:

  • Eight 16-bit timer/counter pulse-width modulator (TCPWM) blocks
  • Center-aligned, Edge, and Pseudo-random modes
  • Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications

Upto 51 GPIO Pins:

  • 64-pin TQFP, 48-pin TQFP and 56-QFN packages

Temperature Ranges: 

  • Automotive Electronics Council (AEC) AEC-Q100 Qualified
  • A Grade: -40°C to +85°C
  • S Grade: -40°C to +105°C

Development Tools:

  • PSoC Creator design environment providing an Integrated Development Environment (IDE) including schematic design entry and build (with analog and digital routing)
  • Industry-standard tool compatibility; after schematic entry, development can be done with Arm-based industry-standard development tools 

  Datasheets:

Highlights
Details

Access to complete AURIX™, Traveo™ and PsoC® technical documentation including data sheets, app notes, etc.:

 

  1. Please register under myinfineon.com (hyperlink) with your company e-mail address
  2. Send login name to: AURIX@infineon.com
  3. Automated update service will be provided for new documents once you are registered
  4. Full registration process can take up to 24h to be completed (due to different time zones). 

 

Click here to see the step-by-step instructions to get registered. 

Videos

Cypress Developer Community Video Library

 

 

Demos, tutorials and  detailed lessons at your fingerprint.

Click here  to discover Cypress PSoc 4 entire Video library 

Partners
Support