Please note that this is an end of life product. See newer alternative product version Please note that this is an end of life product. See newer alternative product version
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END OF LIFE
discontinued
RoHS Compliant

S29GL128P90FFCR20

END OF LIFE
Data Sheet
package
software
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S29GL128P90FFCR20
S29GL128P90FFCR20
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Data Sheet

Product details

  • Density
    128 MBit
  • Family
    GL-P
  • Initial Access Time
    90 ns
  • Interface Frequency (SDR/DDR) (MHz)
    NA
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    0 °C to 85 °C
  • Operating Voltage range
    3 V to 3.6 V
  • Operating Voltage
    3 V
  • Page Access Time
    25 ns
  • Peak Reflow Temp
    260 °C
  • Qualification
    Commercial
OPN
S29GL128P90FFCR20
Product Status discontinued
Infineon Package
PG-LFBGA-64
Package Name FBGA-64 (002-15536)
Packing Size 900
Packing Type TRAY
Moisture Level N/A
Moisture Packing DRY
Lead-free No
Halogen Free No
RoHS Compliant Yes
Infineon stock last updated:
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Product Status discontinued
Infineon Package
PG-LFBGA-64
Package Name FBGA-64 (002-15536)
Packing Size 900
Packing Type TRAY
Moisture Level -
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
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The S29GL128P90FFCR20 is a 128 Mbit, 3 V page-mode Flash memory based on 90 nm MirrorBit® technology. It features uniform 64 Kword (128 Kbyte) sectors and VersatileIO™ control for flexible I/O voltage operation from 1.65 V to VCC. Page access time is 25 ns, random access is 90 ns. Typical endurance is 100,000 erase cycles per sector. Advanced sector protection and low standby current enable robust embedded applications in industrial and commercial environments.

Features

  • 90 nm MirrorBit process technology
  • Single 3 V read/program/erase operation
  • VersatileIO control (1.65 V to VCC I/O)
  • 32-word/64-byte write buffer
  • 8-word/16-byte page read buffer
  • Uniform 64 Kword/128 Kbyte sectors
  • 128-word/256-byte Secured Silicon Sector
  • Advanced sector protection methods
  • Program/Erase Suspend and Resume
  • Hardware data protection (WP#/ACC, VCC)
  • Write pulse glitch protection
  • 100,000 erase cycles per sector (typical)

Benefits

  • High density for embedded storage needs
  • Low voltage reduces power consumption
  • Flexible I/O for easy system integration
  • Fast programming with write buffer
  • Page read buffer speeds up data access
  • Simplifies memory management
  • Secure area for permanent IDs
  • Protects data from accidental changes
  • Suspend/resume boosts system efficiency
  • Hardware protection prevents data loss
  • Glitch protection ensures data integrity
  • High endurance for long device life

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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