Active and preferred
RoHS Compliant
Lead-free

S25FL128LAGNFA013

Data Sheet
package
software

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S25FL128LAGNFA013
S25FL128LAGNFA013
Data Sheet

Product details

  • Density
    128 MBit
  • Family
    FL-L
  • Interface Bandwidth
    66 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / -
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature
    -40 °C to 85 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2032
  • Qualification
    Automotive
Recommended
OPN
S25FL128LAGNFA013
Product Status active and preferred
Infineon Package
PG-WSON-8
Package Name DFN-8 (002-18755)
Packing Size 4000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-WSON-8
Package Name DFN-8 (002-18755)
Packing Size 4000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25FL128LAGNFA013 is a 128 Mb (16 MB) SPI NOR flash memory based on 65-nm floating gate technology, operating from a 2.7 V to 3.6 V supply. It supports single, dual, and quad I/O SPI, with Quad mode read speeds up to 66 MBps at 133 MHz and DDR capability. Features include a 256-byte page programming buffer, uniform sector/block erase, four 256-byte security regions, advanced protection, and AEC-Q100 automotive qualification up to 125°C.

Features

  • SPI interface with single, dual, quad I/O
  • Double data rate (DDR) read support
  • 256-byte page programming buffer
  • Uniform 4 KB/32 KB/64 KB/chip erase
  • 100,000 program/erase cycles minimum
  • 20 year data retention minimum
  • Security regions with individual lock bits
  • Deep Power Down mode for data protection
  • 2.7 V to 3.6 V single supply voltage
  • Operating temperature up to +125°C
  • Input signal overshoot tolerance ±1.0 V
  • Serial flash discoverable parameters (SFDP)

Benefits

  • Flexible I/O options for fast data transfer
  • DDR read boosts throughput for applications
  • Fast programming with 256-byte buffer
  • Multiple erase sizes simplify memory
  • High endurance for reliable long-term use
  • Long data retention ensures information
  • Security regions prevent unauthorized access
  • DPD mode blocks accidental writes/erases
  • Wide supply range supports various systems
  • High temp operation for harsh environments
  • Overshoot tolerance improves signal
  • SFDP enables easy configuration

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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