S25FL128LAGMFV003
on request
RoHS Compliant
Lead-free

S25FL128LAGMFV003

Datasheet
package
software

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S25FL128LAGMFV003
S25FL128LAGMFV003
Datasheet


Product details

  • Density
    128 MBit
  • Family
    FL-L
  • Interface Bandwidth
    66 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 66
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature range
    -40 °C to 105 °C
  • Operating Voltage range
    2.7 V to 3.6 V
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2032

OPN
Product Status on request
Infineon Package
PG-DSO-16
Package Name SOIC-16 (002-15547)
Packing Size 1450
Packing Type TAPE & REEL
Moisture Level N/A
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes

Product Status on request
Infineon Package
PG-DSO-16
Package Name SOIC-16 (002-15547)
Packing Size 1450
Packing Type TAPE & REEL
Moisture Level -
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25FL128LAGMFV003 is a 128 Mb (16 MB) SPI NOR flash memory using 65-nm floating gate technology, supporting single, dual, and quad I/O up to 133 MHz. Operating from 2.7 V to 3.6 V and qualified to AEC-Q100 Grade 1 (–40°C to +125°C), it features a 256-byte page buffer, uniform 4 KB sector erase, advanced security regions, and 100,000 program/erase cycles. High throughput up to 66 MBps quad read and DDR operation make it ideal for automotive and embedded code storage.

Features

  • SPI interface with single, dual, quad I/O
  • Double data rate (DDR) read commands
  • 256-byte page programming buffer
  • Uniform 4 KB sector, 32 KB half block, 64 KB
  • Security regions with OTP lock bits
  • Deep Power Down (DPD) mode for data
  • 100,000 program/erase cycles minimum
  • 20 year data retention minimum
  • 2.7 V to 3.6 V single supply voltage
  • Input voltage tolerance: VSS-1.0 V to VCC+1.0
  • Hardware and software data protection
  • Operating temperature up to +125°C

Benefits

  • Flexible I/O supports faster data transfer
  • DDR read boosts system performance
  • Large buffer enables efficient programming
  • Multiple erase sizes simplify memory
  • Security regions prevent unauthorized access
  • DPD mode blocks accidental writes/erases
  • High endurance ensures long device life
  • Long retention secures critical data
  • Wide supply range fits many designs
  • Tolerates voltage transients for robust use
  • Data protection prevents corruption
  • Wide temp range suits harsh environments

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