CY62167DV30LL-55ZXIT
not for new design
RoHS Compliant
Lead-free

CY62167DV30LL-55ZXIT

Datasheet
package

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CY62167DV30LL-55ZXIT
CY62167DV30LL-55ZXIT
Datasheet


Product details

  • Density
    16 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    1M x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial

OPN
CY62167DV30LL-55ZXIT
Product Status not for new design
Infineon Package
PG-TSOP-48
Package Name TSOP-I-48 (51-85183)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes

Product Status not for new design
Infineon Package
PG-TSOP-48
Package Name TSOP-I-48 (51-85183)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY62167DV30LL-55ZXIT is a 16-Mbit (1 M × 16) CMOS static RAM for low-power systems, operating from 2.2 V to 3.6 V over -40°C to +85°C. The 55 ns speed grade supports fast asynchronous read/write with CE/OE/WE control and byte enables for 8- or 16-bit accesses. It draws 2 mA typical ICC at 1 MHz (4 mA max) and uses automatic power-down to reach 2.5 µA typ standby (22 µA max) at VCC = 3.60 V.

Features

  • 16-Mbit SRAM (1 M × 16)
  • 2.2 V to 3.6 V VCC operation
  • Auto power-down on deselect
  • Standby mode via CE1/CE2
  • 2.5 µA typ ISB1/ISB2 standby
  • 2 mA typ ICC at 1 MHz
  • Data retention at VDR = 1.5 V
  • 10 µA max data retention current
  • Byte write via BHE/BLE enables
  • I/O high-Z via CE/OE/BHE/BLE
  • ESD > 2001 V (MIL-STD-883)
  • Latch-up current > 200 mA

Benefits

  • Integrates into 16-bit buses
  • Works with common 3.3 V rails
  • Cuts idle power when deselected
  • Flexible standby control options
  • µA standby reduces sleep drain
  • Low active current saves battery
  • Keeps data with 1.5 V backup
  • Low retention current saves energy
  • Byte writes reduce write traffic
  • High-Z outputs enable bus sharing
  • Improves robustness vs ESD hits
  • Avoids latch-up in fault events

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