CY62158G30-45BVXI
Active and preferred
RoHS Compliant
Lead-free

CY62158G30-45BVXI

Datasheet
package
ea.
in stock

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CY62158G30-45BVXI
CY62158G30-45BVXI
ea.
Datasheet


Product details

  • Density
    8 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    1M x 8
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial

Recommended
OPN
CY62158G30-45BVXI
Product Status active and preferred
Infineon Package
PG-VFBGA-48
Package Name VFBGA-48 (51-85150)
Packing Size 480
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-VFBGA-48
Package Name VFBGA-48 (51-85150)
Packing Size 480
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY62158G30-45BVXI is a 8-Mbit (1M × 8) CMOS MoBL SRAM with embedded ECC for single-bit error correction. This 45 ns device operates from 2.2 V to 3.6 V over -40°C to 85°C, and uses dual chip enables (CE1/CE2) plus OE/WE for read/write control and automatic power-down. Low standby current is specified up to 6.5 µA. It is offered in a Pb-free 48-ball VFBGA package and supports 1.0-V data retention.

Features

  • 8-Mbit SRAM (1M × 8)
  • Embedded ECC single-bit correction
  • 45 ns read/write cycle time
  • VCC operating 2.2 V to 3.6 V
  • Data retention down to 1.0 V
  • Standby current 1.4 µA typ
  • Standby current 6.5 µA max
  • Operating ICC 25 mA max at 22 MHz
  • Dual chip enable inputs (CE1, CE2)
  • OE/WE controls; High-Z outputs
  • CMOS TTL-compatible I/O levels
  • -40°C to +85°C operating temp

Benefits

  • ECC improves data integrity
  • 45 ns supports fast SRAM access
  • 2.2–3.6 V fits 3 V rails
  • 1.0 V retention preserves data
  • µA standby extends battery life
  • Low ICC reduces system power
  • Dual CE simplifies power gating
  • High-Z outputs ease bus sharing
  • TTL I/O eases MCU interfacing
  • -40°C to +85°C boosts reliability
  • Low SER FIT aids robustness
  • No write-back avoids side effects

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