CY62157EV18LL-55BVXIT
Active and preferred
RoHS Compliant
Lead-free

CY62157EV18LL-55BVXIT

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CY62157EV18LL-55BVXIT
CY62157EV18LL-55BVXIT


Product details

  • Density
    8 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    1.65 V to 2.25 V
  • Organization (X x Y)
    512K x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial

OPN
CY62157EV18LL-55BVXIT
Product Status active and preferred
Infineon Package
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
ea. in stock

Product Status
Active
Infineon Package
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY62157EV18LL-55BVXIT is an 8-Mbit (512K × 16) CMOS asynchronous SRAM for 1.65 V to 2.25 V operation (1.8 V typ) with a 55 ns speed grade. It supports byte writes via BHE/BLE and uses CE1/CE2 and OE/WE controls for read/write and standby. Automatic power-down reduces standby current to 2 µA typical (8 µA max); active current is 6 mA typical at 1 MHz and up to 25 mA max at fmax, in a 48-ball Pb-free VFBGA.

Features

  • 8-Mbit SRAM organized 512K x 16
  • 55 ns read/write cycle (tRC/tWC)
  • Single-supply VCC 1.65 V to 2.25 V
  • 6 mA active current at 1 MHz
  • 2 uA standby (ISB), 8 uA max
  • Data retention to VCC = 1.0 V
  • Data retention current 9 uA max
  • OE-controlled tri-state outputs
  • Dual chip enable inputs CE1/CE2
  • Byte write via BHE and BLE pins

Benefits

  • Fits 16-bit systems with no glue
  • 55 ns cycles support fast access
  • Runs from 1.8 V-class rails
  • Lower active power in SRAM reads
  • Extends battery life in standby
  • Keeps data with backup supply
  • Low retention current saves energy
  • Simplifies bus sharing on outputs
  • Easy expansion with CE1/CE2
  • Updates 8-bit bytes, less writes

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Design resources

Developer community