CY62126EV30LL-45ZSXIT
Active and preferred
RoHS Compliant
Lead-free

CY62126EV30LL-45ZSXIT

Datasheet
package
ea.
in stock

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CY62126EV30LL-45ZSXIT
CY62126EV30LL-45ZSXIT
ea.
Datasheet

Product details

  • Density
    1 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Ni/Pd/Au
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) max
    3.6 V
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    64K x 16
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
  • Speed
    45 ns
Recommended
OPN
CY62126EV30LL-45ZSXIT
Product Status active and preferred
Infineon Package
PG-TSOP-44
Package Name TSOP-II-44 (51-85087)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TSOP-44
Package Name TSOP-II-44 (51-85087)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY62126EV30LL-45ZSXIT is a 1-Mbit (64 K × 16) CMOS SRAM for battery-powered designs. It operates from 2.2 V to 3.6 V and supports 45 ns access. Automatic CE power-down reduces standby current to 4 µA max (1 µA typ) and cuts power when addresses stop toggling. Active current is 2.0 mA max at 1 MHz. It is offered in a Pb-free 44-pin TSOP II package for -40°C to +85°C industrial range.

Features

  • 1-Mbit SRAM organized as 64K × 16
  • 45 ns read/write cycle time
  • 2.2 V to 3.6 V single-supply VCC
  • 1.3 mA typ active at 1 MHz
  • 4 µA max standby current
  • Auto power-down when addr static
  • Data retention at VCC down to 1.5 V
  • 3 µA max data-retention current
  • Byte write via BLE/BHE controls
  • Tri-state I/O via CE/OE/BHE/BLE

Benefits

  • 16-bit bus cuts MCU accesses
  • 45 ns suits fast SRAM interfaces
  • 2.2–3.6 V fits 3 V systems
  • Low active current extends runtime
  • µA standby minimizes sleep drain
  • Auto power-down saves idle power
  • 1.5 V retain data in deep sleep
  • Low ICCDR reduces backup load
  • Byte writes reduce write energy
  • Tri-state eases bus sharing/expand

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