CYW9P62S1-43012EVB-01 PSoC™ 62S1 Wi-Fi BT Pioneer Kit
The USI WM-BAC-CYW-50 module integrates a Cypress PSoC™ 62 MCU and CYW43012 Wi-Fi/BT combo chip in a conformally shielded 10.9x10.9mm 129-LGA module with 46 MCU GPIOs, of which, 39 are available on the CYW9P62S1-43012EVB-01 kit.
The PSoC™ 62 MCU delivers dual-cores, with a 150-MHz Arm® Cortex®-M4 as the primary application processor and a 100-MHz Arm Cortex-M0+ as the secondary processor for low-power operations. It has an embedded 288KB SRAM, 1MB+32KB FLASH, and 128KB ROM.
The CYW43012 features full IEEE 802.11a/b/g/n compatibility, supports 802.11ac MCS8 (256-QAM) and 20 MHz channel bandwidth. The CYW43012 complies with Bluetooth Core Specification version 5.0 with LE 2 Mbps. It also features low power operation supporting sleep and standby modes.
The PSoC™ 62S1 Wi-Fi BT Pioneer Kit includes a Infineon Excelon™ Ultra 4Mbit, 108-MHz Quad SPI nonvolatile F-RAM in an 8-pin SOIC package, that facilitates instant, local and energy-efficient data-logging at write speeds that are as fast as parallel battery-backed solutions and provides virtually unlimited read/write cycle endurance.
The PSoC™ 62S1 Wi-Fi BT Pioneer Board comes with 2 buttons, and a 5-segment slider. Using the 4th generation CapSense™ provided in the PSoC™ 62 Line, self- and mutual-capacitive-sensing systems can be evaluated with this kit.
The PSoC™ 62S1 Wi-Fi BT Pioneer Kit will be supported in the Mbed OS.