CY7C1061G30-10ZXE
Active and preferred
RoHS Compliant

CY7C1061G30-10ZXE

Data Sheet
package

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CY7C1061G30-10ZXE
CY7C1061G30-10ZXE
Data Sheet

Product details

  • Density
    16 MBit
  • Family
    FAST SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 125 °C
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    1Mx16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Automotive (E)
  • Speed
    10 ns
Recommended
OPN
CY7C1061G30-10ZXE
Product Status active and preferred
Infineon Package
PG-TSOP-48
Package Name TSOP-I-48 (51-85183)
Packing Size 192
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-TSOP-48
Package Name TSOP-I-48 (51-85183)
Packing Size 192
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY7C1061G30-10ZXE is a 16-Mbit (1 M × 16) asynchronous CMOS SRAM with embedded ECC that detects and corrects single-bit read errors. The 10 ns speed grade supports high-speed random access over 2.2 V to 3.6 V and Automotive-E operation from −40°C to 125°C. DC specs include ICC 160 mA max and ISB2 50 mA max. It supports byte writes via BLE/BHE and comes in a Pb-free 48-pin TSOP I.

Features

  • 16-Mbit SRAM (1M × 16)
  • Embedded ECC corrects 1-bit errors
  • Address access time tAA = 10 ns
  • 2.2 V to 3.6 V VCC supply
  • 1.0 V data retention mode
  • 20-bit address bus (A0 to A19)
  • 16-bit I/O bus (I/O0 to I/O15)
  • Byte write enables BLE/BHE
  • OE/CE control; outputs go high-Z
  • Input leakage ±5 µA
  • Output leakage ±5 µA
  • ESD > 2001 V (MIL-STD-883)

Benefits

  • Stores 16-bit words without refresh
  • ECC cuts single-bit data corruption
  • 10 ns reads support fast processors
  • 2.2–3.6 V fits many power rails
  • Retain data at 1.0 V backup
  • 20-bit addressing simplifies mapping
  • 16-bit bus boosts bandwidth per access
  • Byte enables reduce write bandwidth
  • High-Z outputs ease bus sharing
  • Low leakage reduces standby loss
  • Low leakage improves data integrity
  • High ESD improves handling robustness
Documents

Design resources

Partner solutions

Developer community

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